STM32F2 Timer triggered DMA sampled ADC

[RallySmith]

Description

The current renode "master" STM32F2 models do not implement Timer TRGO signalling, along with some specific DMA and ADC model functionality as exercised by the eCosPro STM32 ADC driver. The initial major issue being that the current renode head will throw a division by zero exception and not even start the simulation.

See issue template fork:

https://github.com/RallySmith/renode-issue-stm32f2-adc-dma

where the "main" branch will fail to pass the test using the supplied ELF binary, and the "fixed" branch adds the updated models allowing a successful workflow run.

Additional information

The required support is spread across the supplied updated 1.15.0 models, since it would be onerous to try and break down into individual issue template forks for the individual models. Also the ELF test binary is a standard eCos binary from a stm3220g_eval configuration build with no "tweaks" for running under renode; and requires all the updated models to execute correctly under renode.

FYI: I also have updated (fixed) models for some STM32H7 targets, as well as some other STM32 specific support (e.g. Ethernet, SPI DMA, I2C DMA, etc.), but the F2 ADC seemed like a good starting point for pipe-cleaning the process of trying to get changesets accepted into the mainline from a issue-template fork. Locally the updated F2 and H7 models have executed many 1000s of tests also executed on real H/W, and a 3rd-party has verified use of the models against their in-field firmware images for an existing product line.

Do you plan to file a PR?

Yes, at a point when the maintainers are happy with the fixes in the fork.