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Low-level register map addresses #5

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aacuevas opened this issue Feb 24, 2024 · 0 comments
Open

Low-level register map addresses #5

aacuevas opened this issue Feb 24, 2024 · 0 comments

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@aacuevas
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Ported from jonnew/ONI#6

Original text:

Register address spaces
Right now we have 11 specific registers and allow custom registers to exist past that, not giving space for future revisions. Proposed register space would be split three 4MByte (for 32-bit values) regions:
0x00000000-0x000FFFFF: Oni register space. Reserved for the specification registers and future additions to them
0x0010000-0x003FFFFF: Reserved for oni-spec compliance information
0x00400000-0xFFFFFFFF: Device specific optional registers

The split is done this way to make it easier to develop for a wider range of hardware devices, as not all interfaces might have a full 32-bit address scheme available. 24-bit addressing is a common value, and this could cover all addresses on that space. It is unlikely that more than 20bit addressing per region will be required.

This will still allows for the custom options to exist, if required by hardware, without risking overlapping future spec revisions

This was referenced Feb 24, 2024
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