OSCCAL tuning

[nerdralph]

I just took a close look at Christian's old tuning code that used the SOF hook, and think that may be a better solution than my new asm version. Using a hardware timer along with leveraging the the USB sync detection code permits the tuner asm code to be even smaller than mine. A bit more detail is in my ATTinyCore comment.
SpenceKonde/ATTinyCore#465 (comment)

[cpldcpu]

hm.... do all the different attinies have similar timers? Or would this create a lot of complexity by having to adopt it to each MCU individually?

Why don't you think your code would be suitable? I like the idea of interleaving traffic detection with the countint loop. The issue with the original fix was that it did not ignore additional traffic but instead increased the numer of cycles it took to complete osccal. That created issues with Windows 10. I don't think you code suffers from that issue.

[nerdralph]

You have a good point about the timer differences. If you look at the millis code in ATTinyCore, it is rather ugly. I probably could come up with some timer setup code that is a lot cleaner, but my priorities lately have been more on some ARM & SWD stuff.

I do think my code is suitable. My reason for mentioning Christian's old code is the smaller size, to the "tune" of ~20 bytes.

I'll proceed with putting together a PR over the next few days. I'm guessing you want it against master, not the version_2.5 branch?

[cpldcpu]

Yes, please vs master. The 2_5 branch is not recent anymore. Need to clean up that soon.

[nerdralph]

Tag, you're it!
#218