/
project.lst
12344 lines (11704 loc) · 760 KB
/
project.lst
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gplink-0.13.4 alpha
Copyright (c) 1998-2005 gputils project
Listing File Generated: 2-4-2013 11:12:39
Address Value Disassembly Source
------- ----- ----------- ------
; $Id: mios_wrapper.asm 63 2008-01-31 20:44:17Z tk $
;
; This is the MIOS wrapper for SDCC (qualified for v2.5.0 and v2.6.0)
;
; the upper boundary of the stacks are defined here
; customize the values for your needs
#ifndef STACK_HEAD
#define STACK_HEAD 0x37f
#endif
#ifndef STACK_IRQ_HEAD
#define STACK_IRQ_HEAD 0x33f
#endif
;
; ==========================================================================
;
; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
; Licensed for personal non-commercial use only.
; All other rights reserved.
;
; ==========================================================================
;; ---[ MIOS header file ]---
#include <mios.h>
; $Id: mios.h 822 2009-09-17 18:39:53Z tk $
;
; MIOS Definitions file
;
; ==========================================================================
;
; Copyright 1998-2008 Thorsten Klose (tk@midibox.org)
; Licensed for personal non-commercial use only.
; All other rights reserved.
;
; ==========================================================================
;; ==========================================================================
;; Include basic defines which characterize the derivative to
;; simplify dependencies within MIOS source code
;; ==========================================================================
#include <hw_flags.h>
#ifndef _HW_FLAGS_H
#define _HW_FLAGS_H
#ifdef __18F452
#define PIC_DERIVATIVE_CODE_SIZE 0x08000
#define PIC_DERIVATIVE_RAM_SIZE 0x600
#define PIC_DERIVATIVE_EEPROM_SIZE 0x100
#define PIC_DERIVATIVE_IRQ_WORKAROUND 0
#define PIC_DERIVATIVE_NEW_ADC 0
#define PIC_DERIVATIVE_CMCON_INIT 0
#define PIC_DERIVATIVE_T08BIT_INVERTED 0
#define PIC_DERIVATIVE_SET_LCD_4BIT 0
#endif
#ifdef __18F4620
#define PIC_DERIVATIVE_CODE_SIZE 0x10000
#define PIC_DERIVATIVE_RAM_SIZE 0xf80
#define PIC_DERIVATIVE_EEPROM_SIZE 0x400
#define PIC_DERIVATIVE_IRQ_WORKAROUND 1
#define PIC_DERIVATIVE_NEW_ADC 1
#define PIC_DERIVATIVE_CMCON_INIT 1
#define PIC_DERIVATIVE_T08BIT_INVERTED 1
#define PIC_DERIVATIVE_SET_LCD_4BIT 0
#endif
#ifdef __18F4520
#define PIC_DERIVATIVE_CODE_SIZE 0x08000
#define PIC_DERIVATIVE_RAM_SIZE 0x600
#define PIC_DERIVATIVE_EEPROM_SIZE 0x100
#define PIC_DERIVATIVE_IRQ_WORKAROUND 1
#define PIC_DERIVATIVE_NEW_ADC 1
#define PIC_DERIVATIVE_CMCON_INIT 1
#define PIC_DERIVATIVE_T08BIT_INVERTED 0
#define PIC_DERIVATIVE_SET_LCD_4BIT 0
#endif
#ifdef __18F4682
#define PIC_DERIVATIVE_CODE_SIZE 0x14000
#define PIC_DERIVATIVE_RAM_SIZE 0xd00
#define PIC_DERIVATIVE_EEPROM_SIZE 0x400
#define PIC_DERIVATIVE_IRQ_WORKAROUND 0
#define PIC_DERIVATIVE_NEW_ADC 1
#define PIC_DERIVATIVE_CMCON_INIT 1
#define PIC_DERIVATIVE_T08BIT_INVERTED 0
#define PIC_DERIVATIVE_SET_LCD_4BIT 1
#endif
#ifdef __18F4685
#define PIC_DERIVATIVE_CODE_SIZE 0x18000
#define PIC_DERIVATIVE_RAM_SIZE 0xd00
#define PIC_DERIVATIVE_EEPROM_SIZE 0x400
#define PIC_DERIVATIVE_IRQ_WORKAROUND 0
#define PIC_DERIVATIVE_NEW_ADC 1
#define PIC_DERIVATIVE_CMCON_INIT 1
#define PIC_DERIVATIVE_T08BIT_INVERTED 0
#define PIC_DERIVATIVE_SET_LCD_4BIT 1
#endif
#endif
;; ==========================================================================
;; Assembler directives & device specific include file
;;
;; Natively supported devices are listed here.
;; ==========================================================================
#ifdef __18F452
LIST R=DEC
#include <p18f452.inc>
LIST
; P18F452.INC Standard Header File, Version 1.4 Microchip Technology, Inc.
NOLIST
#endif
#ifdef __18F4620
LIST R=DEC
#include <p18f4620.inc>
#endif
#ifdef __18F4520
LIST R=DEC
#include <p18f4520.inc>
#endif
#ifdef __18F4682
LIST R=DEC
#include <p18f4682.inc>
#endif
#ifdef __18F4685
LIST R=DEC
#include <p18f4685.inc>
#endif
;; ==========================================================================
;; General constants
;; ==========================================================================
;; used by MIOS_MIDI_Interface*
MIOS_MIDI_INTERFACE_COMMON EQU 0x00
MIOS_MIDI_INTERFACE_TO_HOST EQU 0x01
;; used by MIOS_MIDI_Merger*
MIOS_MIDI_MERGER_DISABLED EQU 0x00
MIOS_MIDI_MERGER_ENABLED EQU 0x01
MIOS_MIDI_MERGER_MBLINK_EP EQU 0x02
MIOS_MIDI_MERGER_MBLINK_FP EQU 0x03
;; used by MIOS_ENC_PIN_TABLE
#ifdef MIOS_OLD_ENCODER_MODES
MIOS_ENC_MODE_NON_DETENTED EQU 0x00
MIOS_ENC_MODE_DETENTED EQU 0x80
MIOS_ENC_MODE_DETENTED1 EQU 0x80
MIOS_ENC_MODE_DETENTED2 EQU 0x81
MIOS_ENC_MODE_DETENTED3 EQU 0x82
#else
;; new encoder modes: each bit of MIOS_ENC_MODE_xx tells, if an INC / DEC is
;; being triggered on the corresponding edge.
;; Bit 7 6 5 4
;; DEC <- <- <- <-
;; Pin A ___|-------|_______
;; Pin B _______|-------|___
;; INC -> -> -> ->
;; Bit 0 1 2 3
;; Ex.: Bit 76543210
;; DETENTED2 = 0b00100010 = 0x22
;; -> INC will be triggered on edge 1, DEC on edge 5
MIOS_ENC_MODE_NON_DETENTED EQU 0xff
MIOS_ENC_MODE_DETENTED EQU 0xaa
MIOS_ENC_MODE_DETENTED1 EQU 0xaa
MIOS_ENC_MODE_DETENTED2 EQU 0x22
MIOS_ENC_MODE_DETENTED3 EQU 0x88
MIOS_ENC_MODE_DETENTED4 EQU 0xa5
MIOS_ENC_MODE_DETENTED5 EQU 0x5a
#endif
;; used by MIOS_ENC_Speed*
MIOS_ENC_SPEED_SLOW EQU 0
MIOS_ENC_SPEED_NORMAL EQU 1
MIOS_ENC_SPEED_FAST EQU 2
;; used by MIOS_LCD_Type*
MIOS_LCD_TYPE_CLCD EQU 0x00
MIOS_LCD_TYPE_GLCD0 EQU 0x01
MIOS_LCD_TYPE_GLCD1 EQU 0x02
MIOS_LCD_TYPE_GLCD2 EQU 0x03
MIOS_LCD_TYPE_GLCD3 EQU 0x04
MIOS_LCD_TYPE_GLCD4 EQU 0x05
MIOS_LCD_TYPE_MLCD EQU 0x06
MIOS_LCD_TYPE_GLCD_CUSTOM EQU 0x07
;; location of default 5x8 font for graphical displays
MIOS_GLCD_FONT EQU 0x7cfc
;; general config flags (never overwrite this flags directly!!!)
MIOS_BOX_CFG0_LCD_TYPE0 EQU 0 ; selects LCD type, bit 0
MIOS_BOX_CFG0_LCD_TYPE1 EQU 1 ; selects LCD type, bit 1
MIOS_BOX_CFG0_LCD_TYPE2 EQU 2 ; selects LCD type, bit 2
MIOS_BOX_CFG0_USE_GLCD EQU 3 ; if 1, graphical LCD is connected
MIOS_BOX_CFG0_MERGER EQU 4 ; if 1, MIDI merger is enabled
MIOS_BOX_CFG0_MBLINK EQU 5 ; if 1, MIDIbox Link is enabled
MIOS_BOX_CFG0_TO_HOST EQU 6 ; if 1, MIDI interface will run with 38400 baud instead of 31250
MIOS_BOX_CFG0_20MHz EQU 7 ; if 1, it is assumed that box is running with 20 MHz, else with 40 MHz
MIOS_BOX_CFG1_BS_A0 EQU 0 ; A0 of BankStick (never change the bit position)
MIOS_BOX_CFG1_BS_A1 EQU 1 ; A1 of BankStick (never change the bit position)
MIOS_BOX_CFG1_BS_A2 EQU 2 ; A2 of BankStick (never change the bit position)
MIOS_BOX_CFG1_BS_DIS_VERIFY EQU 3 ; if 1, writes to the BankStick will not be verified
MIOS_BOX_CFG1_IIC_STRETCH_CLK EQU 4 ; if 1, IIC clock stretching enabled
;; general status flags (never overwrite this flags directly!!!)
MIOS_BOX_STAT_BS_AVAILABLE EQU 0 ; if 1, BankStick is available
MIOS_BOX_STAT_MBLINK_TUNNEL_PASS EQU 1 ; if 1, a MBLinked event will be tunnled
MIOS_BOX_STAT_SUSPEND_ALL EQU 2 ; if 1, all system and user tasks are suspended
MIOS_BOX_STAT_SUSPEND_USER EQU 3 ; if 1, all user tasks are suspended
MIOS_BOX_STAT_AUTOREPEAT EQU 4 ; if 1, start the auto-repeat handler
MIOS_BOX_STAT_MLCD_TRANSFER EQU 5 ; if 1, a transfer to the MLCD has been started
MIOS_BOX_STAT_FERR EQU 6 ; if 1, a frame error happened during MIDI receive
;; ==========================================================================
;; MIOS Special Function Registers
;; ==========================================================================
MIOS_BOX_CFG0 EQU 0x000
MIOS_BOX_CFG1 EQU 0x001
MIOS_BOX_STAT EQU 0x002
MIOS_PARAMETER1 EQU 0x003
MIOS_PARAMETER2 EQU 0x004
MIOS_PARAMETER3 EQU 0x005
;; ==========================================================================
;; temporary registers for main programs
;; ==========================================================================
TMP1 EQU 0x006
TMP2 EQU 0x007
TMP3 EQU 0x008
TMP4 EQU 0x009
TMP5 EQU 0x00a
;; ==========================================================================
;; temporary registers for IRQs
;; ==========================================================================
IRQ_TMP1 EQU 0x00b
IRQ_TMP2 EQU 0x00c
IRQ_TMP3 EQU 0x00d
IRQ_TMP4 EQU 0x00e
IRQ_TMP5 EQU 0x00f
;; ==========================================================================
;; free memory space for user application:
;; ==========================================================================
;; 0x010-0x37f
;; ==========================================================================
;; MIOS System Registers -- not defined here --
;; never use these memory locations!
;; ==========================================================================
;; 0x380-0x6ff
;; ==========================================================================
;; MIOS System Registers for custom LCD driver
;; ==========================================================================
MIOS_GLCD_BUFFER EQU 0x570 ; note: the buffer must be located at ...0-...7
MIOS_LCD_OPTION1 EQU 0x578 ; contains the first LCD option given by MIOS_LCD_TypeSet
MIOS_LCD_OPTION2 EQU 0x579 ; contains the second LCD option given by MIOS_LCD_TypeSet
MIOS_LCD_CURSOR_POS EQU 0x57a ; the current cursor pos of characters (GLCD: multiplied by width)
MIOS_GLCD_GCURSOR_X EQU 0x57b ; for GLCDs: the current X position of graphical cursor
MIOS_GLCD_GCURSOR_Y EQU 0x57c ; for GLCDs: the current Y position of graphical cursor
MIOS_GLCD_FONT_WIDTH EQU 0x57d ; for GLCDs: the fontwidth given by MIOS_GLCD_FontInit
MIOS_GLCD_FONT_HEIGHT EQU 0x57e ; for GLCDs: the fontheight given by MIOS_GLCD_FontInit
MIOS_GLCD_FONT_X0 EQU 0x57f ; for GLCDs: the first byte within a char entry
MIOS_GLCD_FONT_OFFSET EQU 0x580 ; for GLCDs: the byte offset between the characters
MIOS_GLCD_FONT_PTRL EQU 0x581 ; for GLCDs: pointer to the character table, low-byte
MIOS_GLCD_FONT_PTRH EQU 0x582 ; for GLCDs: pointer to the character table, high-byte
MIOS_LCD_TIMEOUT0 EQU 0x583 ; can be used for timeout loops
MIOS_LCD_TIMEOUT1 EQU 0x584 ; can be used for timeout loops
MIOS_GLCD_TMP1 EQU 0x585 ; can be used as temporary buffer
MIOS_GLCD_TMP2 EQU 0x586 ; can be used as temporary buffer
MIOS_GLCD_TMP3 EQU 0x587 ; can be used as temporary buffer
MIOS_GLCD_TMP4 EQU 0x588 ; can be used as temporary buffer
MIOS_LCD_Y0_OFFSET EQU 0x589 ; Y0 offset of LCD
MIOS_LCD_Y1_OFFSET EQU 0x58a ; Y1 offset of LCD
MIOS_LCD_Y2_OFFSET EQU 0x58b ; Y2 offset of LCD
MIOS_LCD_Y3_OFFSET EQU 0x58c ; Y3 offset of LCD
MIOS_LCD_CURSOR_POS_REAL EQU 0x58d ; unmapped cursor position which has been set with MIOS_LCD_CursorSet
MIOS_GLCD_FONT_PTRU EQU 0x58e ; for GLCDs: pointer to the character table, upper-byte (>64k flash derivatives only)
;; ---[ vectors to MIOS functions (never change!) ]---
#include <mios_vectors.inc>
; $Id: mios_vectors.inc 49 2008-01-30 21:47:31Z tk $
MIOS_MIDI_BeginStream EQU 0x2c00
MIOS_MIDI_DeviceIDAutoSet EQU 0x2c04
MIOS_MIDI_DeviceIDGet EQU 0x2c08
MIOS_MIDI_DeviceIDSet EQU 0x2c0c
MIOS_MIDI_EndStream EQU 0x2c10
MIOS_MIDI_Init EQU 0x2c14
MIOS_MIDI_InterfaceAutoSet EQU 0x2c18
MIOS_MIDI_InterfaceGet EQU 0x2c1c
MIOS_MIDI_InterfaceSet EQU 0x2c20
MIOS_MIDI_MergerGet EQU 0x2c24
MIOS_MIDI_MergerSet EQU 0x2c28
MIOS_MIDI_RxBufferFree EQU 0x2c2c
MIOS_MIDI_RxBufferGet EQU 0x2c30
MIOS_MIDI_RxBufferPut EQU 0x2c34
MIOS_MIDI_RxBufferUsed EQU 0x2c38
MIOS_MIDI_TxBufferFlush EQU 0x2c3c
MIOS_MIDI_TxBufferFree EQU 0x2c40
MIOS_MIDI_TxBufferGet EQU 0x2c44
MIOS_MIDI_TxBufferPut EQU 0x2c48
MIOS_MIDI_TxBufferUsed EQU 0x2c4c
MIOS_MPROC_MergerDisable EQU 0x2c50
MIOS_MPROC_MergerEnable EQU 0x2c54
MIOS_MPROC_MergerGet EQU 0x2c58
MIOS_AIN_DeadbandGet EQU 0x2c5c
MIOS_AIN_DeadbandSet EQU 0x2c60
MIOS_AIN_Muxed EQU 0x2c64
MIOS_AIN_NumberGet EQU 0x2c68
MIOS_AIN_NumberSet EQU 0x2c6c
MIOS_AIN_Pin7bitGet EQU 0x2c70
MIOS_AIN_PinGet EQU 0x2c74
MIOS_AIN_PinLSBGet EQU 0x2c78
MIOS_AIN_PinMSBGet EQU 0x2c7c
MIOS_AIN_UnMuxed EQU 0x2c80
MIOS_MF_PWM_DutyCycleDownGet EQU 0x2c84
MIOS_MF_PWM_DutyCycleDownSet EQU 0x2c88
MIOS_MF_PWM_DutyCycleUpGet EQU 0x2c8c
MIOS_MF_PWM_DutyCycleUpSet EQU 0x2c90
MIOS_MF_DeadbandGet EQU 0x2c94
MIOS_MF_DeadbandSet EQU 0x2c98
MIOS_MF_Disable EQU 0x2c9c
MIOS_MF_Enable EQU 0x2ca0
MIOS_MF_FaderMove EQU 0x2ca4
MIOS_MF_SuspendDisable EQU 0x2ca8
MIOS_MF_SuspendEnable EQU 0x2cac
MIOS_MF_SuspendGet EQU 0x2cb0
MIOS_DIN_PinGet EQU 0x2cb4
MIOS_DIN_SRGet EQU 0x2cb8
MIOS_DOUT_PinGet EQU 0x2cbc
MIOS_DOUT_PinSet EQU 0x2cc0
MIOS_DOUT_PinSet0 EQU 0x2cc4
MIOS_DOUT_PinSet1 EQU 0x2cc8
MIOS_DOUT_SRGet EQU 0x2ccc
MIOS_DOUT_SRSet EQU 0x2cd0
MIOS_ENC_Abs7bitAdd EQU 0x2cd4
MIOS_ENC_Abs7bitGet EQU 0x2cd8
MIOS_ENC_Abs7bitSet EQU 0x2cdc
MIOS_ENC_NumberGet EQU 0x2ce0
MIOS_ENC_SpeedGet EQU 0x2ce4
MIOS_ENC_SpeedSet EQU 0x2ce8
MIOS_SRIO_NumberGet EQU 0x2cec
MIOS_SRIO_NumberSet EQU 0x2cf0
MIOS_SRIO_TS_SensitivityGet EQU 0x2cf4
MIOS_SRIO_TS_SensitivitySet EQU 0x2cf8
MIOS_SRIO_UpdateFrqGet EQU 0x2cfc
MIOS_SRIO_UpdateFrqSet EQU 0x2d00
MIOS_LCD_Clear EQU 0x2d04
MIOS_LCD_Cmd EQU 0x2d08
MIOS_LCD_CursorGet EQU 0x2d0c
MIOS_LCD_CursorSet EQU 0x2d10
MIOS_LCD_Data EQU 0x2d14
MIOS_LCD_Init EQU 0x2d18
MIOS_LCD_PrintBCD1 EQU 0x2d1c
MIOS_LCD_PrintBCD2 EQU 0x2d20
MIOS_LCD_PrintBCD3 EQU 0x2d24
MIOS_LCD_PrintChar EQU 0x2d28
MIOS_LCD_PrintHex1 EQU 0x2d2c
MIOS_LCD_PrintHex2 EQU 0x2d30
MIOS_LCD_PrintMessage EQU 0x2d34
MIOS_LCD_PrintPreconfString EQU 0x2d38
MIOS_LCD_PrintString EQU 0x2d3c
MIOS_LCD_TypeAutoSet EQU 0x2d40
MIOS_LCD_TypeGet EQU 0x2d44
MIOS_LCD_TypeSet EQU 0x2d48
MIOS_LCD_YAddressGet EQU 0x2d4c
MIOS_LCD_YAddressSet EQU 0x2d50
MIOS_GLCD_FontInit EQU 0x2d54
MIOS_GLCD_GCursorGet EQU 0x2d58
MIOS_GLCD_GCursorSet EQU 0x2d5c
MIOS_EEPROM_Read EQU 0x2d60
MIOS_EEPROM_Write EQU 0x2d64
MIOS_FLASH_Read EQU 0x2d68
MIOS_FLASH_Write EQU 0x2d6c
MIOS_BANKSTICK_Read EQU 0x2d70
MIOS_BANKSTICK_Write EQU 0x2d74
MIOS_TIMER_Init EQU 0x2d78
MIOS_TIMER_Start EQU 0x2d7c
MIOS_TIMER_Stop EQU 0x2d80
MIOS_HLP_AddressFromTable EQU 0x2d84
MIOS_HLP_GetBitANDMask EQU 0x2d88
MIOS_HLP_GetBitORMask EQU 0x2d8c
MIOS_HLP_GetIndex_2bytes EQU 0x2d90
MIOS_HLP_GetIndex_4bytes EQU 0x2d94
MIOS_HLP_IndirectJump EQU 0x2d98
MIOS_Delay EQU 0x2d9c
MIOS_GPCounterGet EQU 0x2da0
MIOS_Reset EQU 0x2da4
MIOS_SystemResume EQU 0x2da8
MIOS_SystemSuspend EQU 0x2dac
MIOS_UserResume EQU 0x2db0
MIOS_UserSuspend EQU 0x2db4
MIOS_HLP_16bitAddSaturate EQU 0x2db8
MIOS_DIN_PinAutoRepeatEnable EQU 0x2dbc
MIOS_DIN_PinAutoRepeatDisable EQU 0x2dc0
MIOS_DIN_PinAutoRepeatGet EQU 0x2dc4
MIOS_CLCD_SpecialCharInit EQU 0x2dc8
MIOS_CLCD_SpecialCharsInit EQU 0x2dcc
MIOS_AIN_DynamicPrioSet EQU 0x2dd0
MIOS_AIN_DynamicPrioGet EQU 0x2dd4
MIOS_AIN_LastPinsGet EQU 0x2dd8
MIOS_BANKSTICK_CtrlSet EQU 0x2ddc
MIOS_BANKSTICK_CtrlGet EQU 0x2de0
MIOS_BANKSTICK_WritePage EQU 0x2de4
MIOS_HLP_Dec2BCD EQU 0x2de8
MIOS_LCD_PrintBCD4 EQU 0x2dec
MIOS_LCD_PrintBCD5 EQU 0x2df0
MIOS_LCD_MessageStart EQU 0x2df4
MIOS_LCD_MessageStop EQU 0x2df8
MIOS_MF_PWM_PeriodGet EQU 0x2dfc
MIOS_MF_PWM_PeriodSet EQU 0x2e00
MIOS_IIC_Start EQU 0x2e04
MIOS_IIC_Stop EQU 0x2e08
MIOS_IIC_ByteSend EQU 0x2e0c
MIOS_IIC_ByteReceive EQU 0x2e10
MIOS_IIC_AckSend EQU 0x2e14
MIOS_IIC_NakSend EQU 0x2e18
MIOS_IIC_CtrlSet EQU 0x2e1c
MIOS_IIC_CtrlGet EQU 0x2e20
MIOS_SRIO_DebounceSet EQU 0x2e24
MIOS_SRIO_DebounceGet EQU 0x2e28
MIOS_MF_TouchDetectionReset EQU 0x2e2c
MIOS_BANKSTICK_ReadPage EQU 0x2e30
MIOS_EEPROM_ReadPage EQU 0x2e34
MIOS_EEPROM_WritePage EQU 0x2e38
MIOS_TIMER_ReInit EQU 0x2e3c
MIOS_RESERVED_144 EQU 0x2e40
MIOS_RESERVED_145 EQU 0x2e44
MIOS_RESERVED_146 EQU 0x2e48
MIOS_RESERVED_147 EQU 0x2e4c
MIOS_RESERVED_148 EQU 0x2e50
MIOS_RESERVED_149 EQU 0x2e54
MIOS_RESERVED_150 EQU 0x2e58
MIOS_RESERVED_151 EQU 0x2e5c
MIOS_RESERVED_152 EQU 0x2e60
MIOS_RESERVED_153 EQU 0x2e64
MIOS_RESERVED_154 EQU 0x2e68
MIOS_RESERVED_155 EQU 0x2e6c
MIOS_RESERVED_156 EQU 0x2e70
MIOS_RESERVED_157 EQU 0x2e74
MIOS_RESERVED_158 EQU 0x2e78
MIOS_RESERVED_159 EQU 0x2e7c
MIOS_RESERVED_160 EQU 0x2e80
MIOS_RESERVED_161 EQU 0x2e84
MIOS_RESERVED_162 EQU 0x2e88
MIOS_RESERVED_163 EQU 0x2e8c
MIOS_RESERVED_164 EQU 0x2e90
MIOS_RESERVED_165 EQU 0x2e94
MIOS_RESERVED_166 EQU 0x2e98
MIOS_RESERVED_167 EQU 0x2e9c
MIOS_RESERVED_168 EQU 0x2ea0
MIOS_RESERVED_169 EQU 0x2ea4
MIOS_RESERVED_170 EQU 0x2ea8
MIOS_RESERVED_171 EQU 0x2eac
MIOS_RESERVED_172 EQU 0x2eb0
MIOS_RESERVED_173 EQU 0x2eb4
MIOS_RESERVED_174 EQU 0x2eb8
MIOS_RESERVED_175 EQU 0x2ebc
MIOS_RESERVED_176 EQU 0x2ec0
MIOS_RESERVED_177 EQU 0x2ec4
MIOS_RESERVED_178 EQU 0x2ec8
MIOS_RESERVED_179 EQU 0x2ecc
MIOS_RESERVED_180 EQU 0x2ed0
MIOS_RESERVED_181 EQU 0x2ed4
MIOS_RESERVED_182 EQU 0x2ed8
MIOS_RESERVED_183 EQU 0x2edc
MIOS_RESERVED_184 EQU 0x2ee0
MIOS_RESERVED_185 EQU 0x2ee4
MIOS_RESERVED_186 EQU 0x2ee8
MIOS_RESERVED_187 EQU 0x2eec
MIOS_RESERVED_188 EQU 0x2ef0
MIOS_RESERVED_189 EQU 0x2ef4
MIOS_RESERVED_190 EQU 0x2ef8
MIOS_RESERVED_191 EQU 0x2efc
MIOS_RESERVED_192 EQU 0x2f00
MIOS_RESERVED_193 EQU 0x2f04
MIOS_RESERVED_194 EQU 0x2f08
MIOS_RESERVED_195 EQU 0x2f0c
MIOS_RESERVED_196 EQU 0x2f10
MIOS_RESERVED_197 EQU 0x2f14
MIOS_RESERVED_198 EQU 0x2f18
MIOS_RESERVED_199 EQU 0x2f1c
MIOS_RESERVED_200 EQU 0x2f20
MIOS_RESERVED_201 EQU 0x2f24
MIOS_RESERVED_202 EQU 0x2f28
MIOS_RESERVED_203 EQU 0x2f2c
MIOS_RESERVED_204 EQU 0x2f30
MIOS_RESERVED_205 EQU 0x2f34
MIOS_RESERVED_206 EQU 0x2f38
MIOS_RESERVED_207 EQU 0x2f3c
MIOS_RESERVED_208 EQU 0x2f40
MIOS_RESERVED_209 EQU 0x2f44
MIOS_RESERVED_210 EQU 0x2f48
MIOS_RESERVED_211 EQU 0x2f4c
MIOS_RESERVED_212 EQU 0x2f50
MIOS_RESERVED_213 EQU 0x2f54
MIOS_RESERVED_214 EQU 0x2f58
MIOS_RESERVED_215 EQU 0x2f5c
MIOS_RESERVED_216 EQU 0x2f60
MIOS_RESERVED_217 EQU 0x2f64
MIOS_RESERVED_218 EQU 0x2f68
MIOS_RESERVED_219 EQU 0x2f6c
MIOS_RESERVED_220 EQU 0x2f70
MIOS_RESERVED_221 EQU 0x2f74
MIOS_RESERVED_222 EQU 0x2f78
MIOS_RESERVED_223 EQU 0x2f7c
MIOS_RESERVED_224 EQU 0x2f80
MIOS_RESERVED_225 EQU 0x2f84
MIOS_RESERVED_226 EQU 0x2f88
MIOS_RESERVED_227 EQU 0x2f8c
MIOS_RESERVED_228 EQU 0x2f90
MIOS_RESERVED_229 EQU 0x2f94
MIOS_RESERVED_230 EQU 0x2f98
MIOS_RESERVED_231 EQU 0x2f9c
MIOS_RESERVED_232 EQU 0x2fa0
MIOS_RESERVED_233 EQU 0x2fa4
MIOS_RESERVED_234 EQU 0x2fa8
MIOS_RESERVED_235 EQU 0x2fac
MIOS_RESERVED_236 EQU 0x2fb0
MIOS_RESERVED_237 EQU 0x2fb4
MIOS_RESERVED_238 EQU 0x2fb8
MIOS_RESERVED_239 EQU 0x2fbc
MIOS_RESERVED_240 EQU 0x2fc0
MIOS_RESERVED_241 EQU 0x2fc4
MIOS_RESERVED_242 EQU 0x2fc8
MIOS_RESERVED_243 EQU 0x2fcc
MIOS_RESERVED_244 EQU 0x2fd0
MIOS_RESERVED_245 EQU 0x2fd4
MIOS_RESERVED_246 EQU 0x2fd8
MIOS_RESERVED_247 EQU 0x2fdc
MIOS_RESERVED_248 EQU 0x2fe0
MIOS_RESERVED_249 EQU 0x2fe4
MIOS_RESERVED_250 EQU 0x2fe8
MIOS_RESERVED_251 EQU 0x2fec
MIOS_RESERVED_252 EQU 0x2ff0
MIOS_RESERVED_253 EQU 0x2ff4
MIOS_RESERVED_254 EQU 0x2ff8
MIOS_RESERVED_255 EQU 0x2ffc
;; ---[ user hooks (never change!) ]---
#include <user_vectors.inc>
; $Id: user_vectors.inc 49 2008-01-30 21:47:31Z tk $
;
; User vectortable - contains user hooks to MIOS
;
; ==========================================================================
;
; Copyright 1998-2006 Thorsten Klose (tk@midibox.org)
; Licensed for personal non-commercial use only.
; All other rights reserved.
;
; ==========================================================================
;; never change the origin or the order of entries!
org 0x3000
_User_Init
003000 ef64 goto 0x58c8 goto USER_Init
003002 f02c
_USER_Tick
003004 ef6a goto 0x58d4 goto USER_Tick
003006 f02c
_USER_Timer
003008 ef70 goto 0x58e0 goto USER_Timer
00300a f02c
_USER_MPROC_DebugTrigger
00300c ef7f goto 0x58fe goto USER_MPROC_DebugTrigger
00300e f02c
_USER_DISPLAY_Init
003010 ef80 goto 0x5900 goto USER_DISPLAY_Init
003012 f02c
_USER_DISPLAY_Tick
003014 ef86 goto 0x590c goto USER_DISPLAY_Tick
003016 f02c
_USER_SR_Service_Prepare
003018 efc2 goto 0x5984 goto USER_SR_Service_Prepare
00301a f02c
_USER_SR_Service_Finish
00301c efd1 goto 0x59a2 goto USER_SR_Service_Finish
00301e f02c
_USER_DIN_NotifyToggle
003020 efb2 goto 0x5964 goto USER_DIN_NotifyToggle
003022 f02c
_USER_ENC_NotifyChange
003024 efba goto 0x5974 goto USER_ENC_NotifyChange
003026 f02c
_USER_AIN_NotifyChange
003028 efe0 goto 0x59c0 goto USER_AIN_NotifyChange
00302a f02c
_USER_MPROC_NotifyReceivedByte
00302c efaa goto 0x5954 goto USER_MPROC_NotifyReceivedByte
00302e f02c
_USER_MPROC_NotifyTimeout
003030 efa4 goto 0x5948 goto USER_MPROC_NotifyTimeout
003032 f02c
_USER_MPROC_NotifyReceivedEvent
003034 ef8c goto 0x5918 goto USER_MPROC_NotifyReceivedEvent
003036 f02c
_USER_MPROC_NotifyFoundEvent
003038 ef97 goto 0x592e goto USER_MPROC_NotifyFoundEvent
00303a f02c
_USER_LCD_Init
00303c ef36 goto 0x626c goto USER_LCD_Init
00303e f031
_USER_LCD_Clear
003040 ef37 goto 0x626e goto USER_LCD_Clear
003042 f031
_USER_LCD_CursorSet
003044 ef38 goto 0x6270 goto USER_LCD_CursorSet
003046 f031
_USER_LCD_PrintChar
003048 ef39 goto 0x6272 goto USER_LCD_PrintChar
00304a f031
_USER_MIDI_NotifyRx
00304c efb1 goto 0x5962 goto USER_MIDI_NotifyRx
00304e f02c
_USER_MIDI_NotifyTx
003050 efb0 goto 0x5960 goto USER_MIDI_NotifyTx
003052 f02c
_USER_LCD_Data
003054 ef3a goto 0x6274 goto USER_LCD_Data
003056 f031
_USER_LCD_Cmd
003058 ef3b goto 0x6276 goto USER_LCD_Cmd
00305a f031
_USER_LCD_SpecialCharInit
00305c ef3c goto 0x6278 goto USER_LCD_SpecialCharInit
00305e f031
USER_RESERVED_25
003060 0012 return 0 return
003062 0000 nop nop
USER_RESERVED_26
003064 0012 return 0 return
003066 0000 nop nop
USER_RESERVED_27
003068 0012 return 0 return
00306a 0000 nop nop
USER_RESERVED_28
00306c 0012 return 0 return
00306e 0000 nop nop
USER_RESERVED_29
003070 0012 return 0 return
003072 0000 nop nop
USER_RESERVED_30
003074 0012 return 0 return
003076 0000 nop nop
USER_RESERVED_31
003078 0012 return 0 return
00307a 0000 nop nop
USER_RESERVED_32
00307c 0012 return 0 return
00307e 0000 nop nop
;; ==========================================================================
;; General Application Settings
;; ==========================================================================
;; ---[ configuration table for MIDI processor ]---
#ifndef DONT_INCLUDE_MIOS_MT_TABLE
;; dummy table located in $MIOS_PATH/include/asm
;; If the application should use MT entries,
;; just add "-DDONT_INCLUDE_MIOS_MT_TABLE" to MIOS_WRAPPER_DEFINES
;; and build the table within the C program with:
;;
;; MIOS_MT_TABLE {
;; MIOS_MT_ENTRY(0xb0, 0x10), // CC#16
;; MIOS_MT_ENTRY(0xb0, 0x11), // CC#17
;; MIOS_MT_ENTRY(0xb0, 0x12), // CC#18
;; MIOS_MT_ENTRY(0xb0, 0x13), // CC#19
;; MIOS_MT_EOT
;; };
;;
;; The MIOS_MT_* macros are defined in $MIOS_PATH/include/c/cmios.h
;;
;; Note that due to the inflexibility of the MT Table concept, it isn't
;; recommented for new designs
#include <mios_mt_table.inc>
; $Id: mios_mt_table.inc 69 2008-02-01 00:20:18Z tk $
;
; "Dummy" MIDI Trigger Configuaration Table
;
; Should be included by the application, if the MIDI processor feature
; is not used in order to pre-initialize the table area with EOT's
;
; Note: due to the inflexible concept (e.g. handling of Note On/Off events),
; the usage of this function is not recommented for new designs - please parse
; MIDI events locally within the application.
;
;
org 0x3080 ; never change the origin!
;; --------------------------------------------------------------------------
;; The MIDI Trigger table maps incoming MIDI events to control elements
;; (pots/faders, encoders, buttons, LEDs, ...)
;;
;; After the MIOS MIDI processor (MPROC) has received a complete event, it
;; searches in this table for a matching entry and calls USER_MPROC_NotifyFoundEvent
;; with the table index in WREG and the MIDI event in MIOS_PARAMETER[123]
;;
;; Note also that the MIDI processor stops scanning the table after
;; the first MT_EOT entry
;;
;; Note2: never change the origin (memory location) of this table!
;;
;; Optionally this table can also be used to define events, which should be
;; transmitted (Example: see example_ain64_din128_dout128), so that incoming
;; and outgoing events are located at one place
;;
;; The table *must* contain 256 entries. Unused entries should be filled with
;; MT_EOT.
;; --------------------------------------------------------------------------
;; MIDI Trigger entry structure
MT_ENTRY MACRO event_0, event_1
dw (event_1 << 8) | event_0
ENDM
MT_EOT MACRO
003080 ffff dw 0xffff ;unknown opcode dw 0xffff
003082 ffff dw 0xffff ;unknown opcode
003084 ffff dw 0xffff ;unknown opcode
003086 ffff dw 0xffff ;unknown opcode
003088 ffff dw 0xffff ;unknown opcode
00308a ffff dw 0xffff ;unknown opcode
00308c ffff dw 0xffff ;unknown opcode
00308e ffff dw 0xffff ;unknown opcode
003090 ffff dw 0xffff ;unknown opcode
003092 ffff dw 0xffff ;unknown opcode
003094 ffff dw 0xffff ;unknown opcode
003096 ffff dw 0xffff ;unknown opcode
003098 ffff dw 0xffff ;unknown opcode
00309a ffff dw 0xffff ;unknown opcode
00309c ffff dw 0xffff ;unknown opcode
00309e ffff dw 0xffff ;unknown opcode
0030a0 ffff dw 0xffff ;unknown opcode
0030a2 ffff dw 0xffff ;unknown opcode
0030a4 ffff dw 0xffff ;unknown opcode
0030a6 ffff dw 0xffff ;unknown opcode
0030a8 ffff dw 0xffff ;unknown opcode
0030aa ffff dw 0xffff ;unknown opcode
0030ac ffff dw 0xffff ;unknown opcode
0030ae ffff dw 0xffff ;unknown opcode
0030b0 ffff dw 0xffff ;unknown opcode
0030b2 ffff dw 0xffff ;unknown opcode
0030b4 ffff dw 0xffff ;unknown opcode
0030b6 ffff dw 0xffff ;unknown opcode
0030b8 ffff dw 0xffff ;unknown opcode
0030ba ffff dw 0xffff ;unknown opcode
0030bc ffff dw 0xffff ;unknown opcode
0030be ffff dw 0xffff ;unknown opcode
0030c0 ffff dw 0xffff ;unknown opcode
0030c2 ffff dw 0xffff ;unknown opcode
0030c4 ffff dw 0xffff ;unknown opcode
0030c6 ffff dw 0xffff ;unknown opcode
0030c8 ffff dw 0xffff ;unknown opcode
0030ca ffff dw 0xffff ;unknown opcode
0030cc ffff dw 0xffff ;unknown opcode
0030ce ffff dw 0xffff ;unknown opcode
0030d0 ffff dw 0xffff ;unknown opcode
0030d2 ffff dw 0xffff ;unknown opcode
0030d4 ffff dw 0xffff ;unknown opcode
0030d6 ffff dw 0xffff ;unknown opcode
0030d8 ffff dw 0xffff ;unknown opcode
0030da ffff dw 0xffff ;unknown opcode
0030dc ffff dw 0xffff ;unknown opcode
0030de ffff dw 0xffff ;unknown opcode
0030e0 ffff dw 0xffff ;unknown opcode
0030e2 ffff dw 0xffff ;unknown opcode
0030e4 ffff dw 0xffff ;unknown opcode
0030e6 ffff dw 0xffff ;unknown opcode
0030e8 ffff dw 0xffff ;unknown opcode
0030ea ffff dw 0xffff ;unknown opcode
0030ec ffff dw 0xffff ;unknown opcode
0030ee ffff dw 0xffff ;unknown opcode
0030f0 ffff dw 0xffff ;unknown opcode
0030f2 ffff dw 0xffff ;unknown opcode
0030f4 ffff dw 0xffff ;unknown opcode
0030f6 ffff dw 0xffff ;unknown opcode
0030f8 ffff dw 0xffff ;unknown opcode
0030fa ffff dw 0xffff ;unknown opcode
0030fc ffff dw 0xffff ;unknown opcode
0030fe ffff dw 0xffff ;unknown opcode
003100 ffff dw 0xffff ;unknown opcode
003102 ffff dw 0xffff ;unknown opcode
003104 ffff dw 0xffff ;unknown opcode
003106 ffff dw 0xffff ;unknown opcode
003108 ffff dw 0xffff ;unknown opcode
00310a ffff dw 0xffff ;unknown opcode
00310c ffff dw 0xffff ;unknown opcode
00310e ffff dw 0xffff ;unknown opcode
003110 ffff dw 0xffff ;unknown opcode
003112 ffff dw 0xffff ;unknown opcode
003114 ffff dw 0xffff ;unknown opcode
003116 ffff dw 0xffff ;unknown opcode
003118 ffff dw 0xffff ;unknown opcode
00311a ffff dw 0xffff ;unknown opcode
00311c ffff dw 0xffff ;unknown opcode
00311e ffff dw 0xffff ;unknown opcode
003120 ffff dw 0xffff ;unknown opcode
003122 ffff dw 0xffff ;unknown opcode
003124 ffff dw 0xffff ;unknown opcode
003126 ffff dw 0xffff ;unknown opcode
003128 ffff dw 0xffff ;unknown opcode
00312a ffff dw 0xffff ;unknown opcode
00312c ffff dw 0xffff ;unknown opcode
00312e ffff dw 0xffff ;unknown opcode
003130 ffff dw 0xffff ;unknown opcode
003132 ffff dw 0xffff ;unknown opcode
003134 ffff dw 0xffff ;unknown opcode
003136 ffff dw 0xffff ;unknown opcode
003138 ffff dw 0xffff ;unknown opcode
00313a ffff dw 0xffff ;unknown opcode
00313c ffff dw 0xffff ;unknown opcode
00313e ffff dw 0xffff ;unknown opcode
003140 ffff dw 0xffff ;unknown opcode
003142 ffff dw 0xffff ;unknown opcode
003144 ffff dw 0xffff ;unknown opcode
003146 ffff dw 0xffff ;unknown opcode
003148 ffff dw 0xffff ;unknown opcode
00314a ffff dw 0xffff ;unknown opcode
00314c ffff dw 0xffff ;unknown opcode
00314e ffff dw 0xffff ;unknown opcode
003150 ffff dw 0xffff ;unknown opcode
003152 ffff dw 0xffff ;unknown opcode
003154 ffff dw 0xffff ;unknown opcode
003156 ffff dw 0xffff ;unknown opcode
003158 ffff dw 0xffff ;unknown opcode
00315a ffff dw 0xffff ;unknown opcode
00315c ffff dw 0xffff ;unknown opcode
00315e ffff dw 0xffff ;unknown opcode
003160 ffff dw 0xffff ;unknown opcode
003162 ffff dw 0xffff ;unknown opcode
003164 ffff dw 0xffff ;unknown opcode
003166 ffff dw 0xffff ;unknown opcode
003168 ffff dw 0xffff ;unknown opcode
00316a ffff dw 0xffff ;unknown opcode
00316c ffff dw 0xffff ;unknown opcode
00316e ffff dw 0xffff ;unknown opcode
003170 ffff dw 0xffff ;unknown opcode
003172 ffff dw 0xffff ;unknown opcode
003174 ffff dw 0xffff ;unknown opcode
003176 ffff dw 0xffff ;unknown opcode
003178 ffff dw 0xffff ;unknown opcode
00317a ffff dw 0xffff ;unknown opcode
00317c ffff dw 0xffff ;unknown opcode
00317e ffff dw 0xffff ;unknown opcode
003180 ffff dw 0xffff ;unknown opcode
003182 ffff dw 0xffff ;unknown opcode
003184 ffff dw 0xffff ;unknown opcode
003186 ffff dw 0xffff ;unknown opcode
003188 ffff dw 0xffff ;unknown opcode
00318a ffff dw 0xffff ;unknown opcode
00318c ffff dw 0xffff ;unknown opcode
00318e ffff dw 0xffff ;unknown opcode
003190 ffff dw 0xffff ;unknown opcode
003192 ffff dw 0xffff ;unknown opcode
003194 ffff dw 0xffff ;unknown opcode
003196 ffff dw 0xffff ;unknown opcode
003198 ffff dw 0xffff ;unknown opcode
00319a ffff dw 0xffff ;unknown opcode
00319c ffff dw 0xffff ;unknown opcode
00319e ffff dw 0xffff ;unknown opcode
0031a0 ffff dw 0xffff ;unknown opcode
0031a2 ffff dw 0xffff ;unknown opcode
0031a4 ffff dw 0xffff ;unknown opcode
0031a6 ffff dw 0xffff ;unknown opcode
0031a8 ffff dw 0xffff ;unknown opcode
0031aa ffff dw 0xffff ;unknown opcode
0031ac ffff dw 0xffff ;unknown opcode
0031ae ffff dw 0xffff ;unknown opcode
0031b0 ffff dw 0xffff ;unknown opcode
0031b2 ffff dw 0xffff ;unknown opcode
0031b4 ffff dw 0xffff ;unknown opcode
0031b6 ffff dw 0xffff ;unknown opcode
0031b8 ffff dw 0xffff ;unknown opcode
0031ba ffff dw 0xffff ;unknown opcode
0031bc ffff dw 0xffff ;unknown opcode
0031be ffff dw 0xffff ;unknown opcode
0031c0 ffff dw 0xffff ;unknown opcode
0031c2 ffff dw 0xffff ;unknown opcode
0031c4 ffff dw 0xffff ;unknown opcode
0031c6 ffff dw 0xffff ;unknown opcode
0031c8 ffff dw 0xffff ;unknown opcode
0031ca ffff dw 0xffff ;unknown opcode
0031cc ffff dw 0xffff ;unknown opcode
0031ce ffff dw 0xffff ;unknown opcode
0031d0 ffff dw 0xffff ;unknown opcode
0031d2 ffff dw 0xffff ;unknown opcode
0031d4 ffff dw 0xffff ;unknown opcode
0031d6 ffff dw 0xffff ;unknown opcode
0031d8 ffff dw 0xffff ;unknown opcode
0031da ffff dw 0xffff ;unknown opcode
0031dc ffff dw 0xffff ;unknown opcode
0031de ffff dw 0xffff ;unknown opcode
0031e0 ffff dw 0xffff ;unknown opcode
0031e2 ffff dw 0xffff ;unknown opcode
0031e4 ffff dw 0xffff ;unknown opcode
0031e6 ffff dw 0xffff ;unknown opcode
0031e8 ffff dw 0xffff ;unknown opcode
0031ea ffff dw 0xffff ;unknown opcode
0031ec ffff dw 0xffff ;unknown opcode
0031ee ffff dw 0xffff ;unknown opcode
0031f0 ffff dw 0xffff ;unknown opcode
0031f2 ffff dw 0xffff ;unknown opcode
0031f4 ffff dw 0xffff ;unknown opcode
0031f6 ffff dw 0xffff ;unknown opcode
0031f8 ffff dw 0xffff ;unknown opcode
0031fa ffff dw 0xffff ;unknown opcode
0031fc ffff dw 0xffff ;unknown opcode
0031fe ffff dw 0xffff ;unknown opcode
003200 ffff dw 0xffff ;unknown opcode
003202 ffff dw 0xffff ;unknown opcode
003204 ffff dw 0xffff ;unknown opcode
003206 ffff dw 0xffff ;unknown opcode
003208 ffff dw 0xffff ;unknown opcode
00320a ffff dw 0xffff ;unknown opcode
00320c ffff dw 0xffff ;unknown opcode
00320e ffff dw 0xffff ;unknown opcode
003210 ffff dw 0xffff ;unknown opcode
003212 ffff dw 0xffff ;unknown opcode
003214 ffff dw 0xffff ;unknown opcode
003216 ffff dw 0xffff ;unknown opcode
003218 ffff dw 0xffff ;unknown opcode
00321a ffff dw 0xffff ;unknown opcode
00321c ffff dw 0xffff ;unknown opcode
00321e ffff dw 0xffff ;unknown opcode
003220 ffff dw 0xffff ;unknown opcode
003222 ffff dw 0xffff ;unknown opcode
003224 ffff dw 0xffff ;unknown opcode
003226 ffff dw 0xffff ;unknown opcode
003228 ffff dw 0xffff ;unknown opcode
00322a ffff dw 0xffff ;unknown opcode
00322c ffff dw 0xffff ;unknown opcode
00322e ffff dw 0xffff ;unknown opcode
003230 ffff dw 0xffff ;unknown opcode
003232 ffff dw 0xffff ;unknown opcode
003234 ffff dw 0xffff ;unknown opcode
003236 ffff dw 0xffff ;unknown opcode
003238 ffff dw 0xffff ;unknown opcode
00323a ffff dw 0xffff ;unknown opcode
00323c ffff dw 0xffff ;unknown opcode
00323e ffff dw 0xffff ;unknown opcode
003240 ffff dw 0xffff ;unknown opcode
003242 ffff dw 0xffff ;unknown opcode
003244 ffff dw 0xffff ;unknown opcode
003246 ffff dw 0xffff ;unknown opcode
003248 ffff dw 0xffff ;unknown opcode
00324a ffff dw 0xffff ;unknown opcode
00324c ffff dw 0xffff ;unknown opcode
00324e ffff dw 0xffff ;unknown opcode
003250 ffff dw 0xffff ;unknown opcode
003252 ffff dw 0xffff ;unknown opcode
003254 ffff dw 0xffff ;unknown opcode
003256 ffff dw 0xffff ;unknown opcode
003258 ffff dw 0xffff ;unknown opcode
00325a ffff dw 0xffff ;unknown opcode
00325c ffff dw 0xffff ;unknown opcode
00325e ffff dw 0xffff ;unknown opcode
003260 ffff dw 0xffff ;unknown opcode
003262 ffff dw 0xffff ;unknown opcode
003264 ffff dw 0xffff ;unknown opcode
003266 ffff dw 0xffff ;unknown opcode
003268 ffff dw 0xffff ;unknown opcode
00326a ffff dw 0xffff ;unknown opcode
00326c ffff dw 0xffff ;unknown opcode
00326e ffff dw 0xffff ;unknown opcode
003270 ffff dw 0xffff ;unknown opcode
003272 ffff dw 0xffff ;unknown opcode
003274 ffff dw 0xffff ;unknown opcode
003276 ffff dw 0xffff ;unknown opcode
003278 ffff dw 0xffff ;unknown opcode
00327a ffff dw 0xffff ;unknown opcode
00327c ffff dw 0xffff ;unknown opcode
00327e ffff dw 0xffff ;unknown opcode
ENDM
_MIOS_MPROC_EVENT_TABLE
MIOS_MPROC_EVENT_TABLE
;; entry 0x00-0x0f
MT_EOT