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Is this note correct? Both source operands are registers. What is being zero-extended? The < comparison is treating both operands as unsigned but nothing is being sign-extended or zero-extended.
The text was updated successfully, but these errors were encountered:
Is this note correct? Both source operands are registers. What is being zero-extended? The < comparison is treating both operands as unsigned but nothing is being sign-extended or zero-extended.
The text was updated successfully, but these errors were encountered: