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Do Intel(R) Xeon(R) 2nd Generation Scalable Processors have support for L3 cat as specified in the README? #241

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xaviersalvat91 opened this issue Apr 13, 2023 · 1 comment

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@xaviersalvat91
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xaviersalvat91 commented Apr 13, 2023

Hi,

I am using a Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz which is part of the familiy of Intel(R) Xeon(R) 2nd Generation Scalable Processors. I have installed the intel CAT tool and seems that there is no support for L3 CAT even though is specified in the Readme that Xeon(R) 2nd Generation Scalable Processors support L3 cat.

$ sudo pqos --display-verbose --super-verbose

NOTE: Mixed use of MSR and kernel interfaces to manage
CAT or CMT & MBM may lead to unexpected behavior.
INFO: Requested interface: AUTO
INFO: resctrl detected
INFO: Selected interface: OS
INFO: CACHE: type 1, level 1, max id sharing this cache 2 (1 bits)
DEBUG: CACHE: not inclusive, direct mapped, 8 way(s), 64 set(s), line size 64, 1 partition(s)
INFO: CACHE: type 2, level 1, max id sharing this cache 2 (1 bits)
DEBUG: CACHE: not inclusive, direct mapped, 8 way(s), 64 set(s), line size 64, 1 partition(s)
INFO: CACHE: type 3, level 2, max id sharing this cache 2 (1 bits)
DEBUG: CACHE: not inclusive, direct mapped, 16 way(s), 1024 set(s), line size 64, 1 partition(s)
INFO: CACHE: type 3, level 3, max id sharing this cache 32 (5 bits)
DEBUG: CACHE: not inclusive, complex cache indexing, 11 way(s), 32768 set(s), line size 64, 1 partition(s)
DEBUG: Detected core 0, socket 0, L2 ID 0, L3 ID 0
DEBUG: Detected core 1, socket 0, L2 ID 1, L3 ID 0
DEBUG: Detected core 2, socket 0, L2 ID 2, L3 ID 0
DEBUG: Detected core 3, socket 0, L2 ID 3, L3 ID 0
DEBUG: Detected core 4, socket 0, L2 ID 4, L3 ID 0
DEBUG: Detected core 5, socket 0, L2 ID 5, L3 ID 0
DEBUG: Detected core 6, socket 0, L2 ID 6, L3 ID 0
DEBUG: Detected core 7, socket 0, L2 ID 7, L3 ID 0
DEBUG: Detected core 8, socket 0, L2 ID 8, L3 ID 0
DEBUG: Detected core 9, socket 0, L2 ID 9, L3 ID 0
DEBUG: Detected core 10, socket 0, L2 ID 10, L3 ID 0
DEBUG: Detected core 11, socket 0, L2 ID 11, L3 ID 0
DEBUG: Detected core 12, socket 0, L2 ID 12, L3 ID 0
DEBUG: Detected core 13, socket 0, L2 ID 13, L3 ID 0
DEBUG: Detected core 14, socket 0, L2 ID 14, L3 ID 0
DEBUG: Detected core 15, socket 0, L2 ID 15, L3 ID 0
DEBUG: Detected core 16, socket 1, L2 ID 16, L3 ID 1
DEBUG: Detected core 17, socket 1, L2 ID 17, L3 ID 1
DEBUG: Detected core 18, socket 1, L2 ID 18, L3 ID 1
DEBUG: Detected core 19, socket 1, L2 ID 19, L3 ID 1
DEBUG: Detected core 20, socket 1, L2 ID 20, L3 ID 1
DEBUG: Detected core 21, socket 1, L2 ID 21, L3 ID 1
DEBUG: Detected core 22, socket 1, L2 ID 22, L3 ID 1
DEBUG: Detected core 23, socket 1, L2 ID 23, L3 ID 1
DEBUG: Detected core 24, socket 1, L2 ID 24, L3 ID 1
DEBUG: Detected core 25, socket 1, L2 ID 25, L3 ID 1
DEBUG: Detected core 26, socket 1, L2 ID 26, L3 ID 1
DEBUG: Detected core 27, socket 1, L2 ID 27, L3 ID 1
DEBUG: Detected core 28, socket 1, L2 ID 28, L3 ID 1
DEBUG: Detected core 29, socket 1, L2 ID 29, L3 ID 1
DEBUG: Detected core 30, socket 1, L2 ID 30, L3 ID 1
DEBUG: Detected core 31, socket 1, L2 ID 31, L3 ID 1
DEBUG: Detected core 32, socket 0, L2 ID 0, L3 ID 0
DEBUG: Detected core 33, socket 0, L2 ID 1, L3 ID 0
DEBUG: Detected core 34, socket 0, L2 ID 2, L3 ID 0
DEBUG: Detected core 35, socket 0, L2 ID 3, L3 ID 0
DEBUG: Detected core 36, socket 0, L2 ID 4, L3 ID 0
DEBUG: Detected core 37, socket 0, L2 ID 5, L3 ID 0
DEBUG: Detected core 38, socket 0, L2 ID 6, L3 ID 0
DEBUG: Detected core 39, socket 0, L2 ID 7, L3 ID 0
DEBUG: Detected core 40, socket 0, L2 ID 8, L3 ID 0
DEBUG: Detected core 41, socket 0, L2 ID 9, L3 ID 0
DEBUG: Detected core 42, socket 0, L2 ID 10, L3 ID 0
DEBUG: Detected core 43, socket 0, L2 ID 11, L3 ID 0
DEBUG: Detected core 44, socket 0, L2 ID 12, L3 ID 0
DEBUG: Detected core 45, socket 0, L2 ID 13, L3 ID 0
DEBUG: Detected core 46, socket 0, L2 ID 14, L3 ID 0
DEBUG: Detected core 47, socket 0, L2 ID 15, L3 ID 0
DEBUG: Detected core 48, socket 1, L2 ID 16, L3 ID 1
DEBUG: Detected core 49, socket 1, L2 ID 17, L3 ID 1
DEBUG: Detected core 50, socket 1, L2 ID 18, L3 ID 1
DEBUG: Detected core 51, socket 1, L2 ID 19, L3 ID 1
DEBUG: Detected core 52, socket 1, L2 ID 20, L3 ID 1
DEBUG: Detected core 53, socket 1, L2 ID 21, L3 ID 1
DEBUG: Detected core 54, socket 1, L2 ID 22, L3 ID 1
DEBUG: Detected core 55, socket 1, L2 ID 23, L3 ID 1
DEBUG: Detected core 56, socket 1, L2 ID 24, L3 ID 1
DEBUG: Detected core 57, socket 1, L2 ID 25, L3 ID 1
DEBUG: Detected core 58, socket 1, L2 ID 26, L3 ID 1
DEBUG: Detected core 59, socket 1, L2 ID 27, L3 ID 1
DEBUG: Detected core 60, socket 1, L2 ID 28, L3 ID 1
DEBUG: Detected core 61, socket 1, L2 ID 29, L3 ID 1
DEBUG: Detected core 62, socket 1, L2 ID 30, L3 ID 1
DEBUG: Detected core 63, socket 1, L2 ID 31, L3 ID 1
INFO: resctrl detected
INFO: Monitoring capability detected
INFO: L3CA capability not detected
INFO: L2CA capability not detected
INFO: MBA capability detected
INFO: MBA details: #COS=8, linear, max=90, step=10
INFO: OS support for MBA CTRL unknown
DEBUG: resctrl group COS1 detected
DEBUG: resctrl group COS2 detected
DEBUG: resctrl group COS3 detected
DEBUG: resctrl group COS4 detected
DEBUG: resctrl group COS5 detected
DEBUG: resctrl group COS6 detected
DEBUG: resctrl group COS7 detected
DEBUG: allocation init OK
INFO: Detected perf monitoring support for Retired CPU Instructions
INFO: Detected perf monitoring support for Unhalted CPU Cycles
INFO: Detected perf monitoring support for Instructions/Cycle
INFO: Detected perf monitoring support for LLC Misses
INFO: Detected perf monitoring support for LLC References
INFO: Detected resctrl support for LLC Occupancy
INFO: Detected resctrl support for Total Memory B/W
INFO: Detected resctrl support for Local Memory B/W
DEBUG: monitoring init OK
OS capabilities (Linux kernel 5.4.0-146-generic)
Monitoring
Cache Monitoring Technology (CMT) events:
LLC Occupancy (LLC)
scale factor: 1
max rmid: 128
Memory Bandwidth Monitoring (MBM) events:
Local Memory Bandwidth (LMEM)
scale factor: 1
max rmid: 128
Total Memory Bandwidth (TMEM)
scale factor: 1
max rmid: 128
Remote Memory Bandwidth (RMEM) (calculated)
scale factor: 1
max rmid: 128
PMU events:
LLC misses
scale factor: 1
max rmid: 128
LLC references
scale factor: 1
max rmid: 128
Instructions/Clock (IPC)
scale factor: 1
max rmid: 128
Allocation
Memory Bandwidth Allocation (MBA)
Num COS: 8
Granularity: 10
Min B/W: 10
Type: linear
Cache information
L3 Cache
Num ways: 11
Way size: 2097152 bytes
Num sets: 32768
Line size: 64 bytes
Total size: 23068672 bytes
L2 Cache
Num ways: 16
Way size: 65536 bytes
Num sets: 1024
Line size: 64 bytes
Total size: 1048576 bytes

Do I have to setup something else apart from downloading and installing the tool? Where I can see which Xeon(R) 2nd Generation Scalable Processors support L3 CAT

Thanks

@rkanagar
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Hi

Please refer following similar issue
#228

Thanks,
Raghavan K.

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