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MBA is inaccurate in Intel(R) Xeon(R) Gold 5220R CPU #171

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liuyingdong-byte opened this issue Nov 9, 2020 · 2 comments
Open

MBA is inaccurate in Intel(R) Xeon(R) Gold 5220R CPU #171

liuyingdong-byte opened this issue Nov 9, 2020 · 2 comments

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@liuyingdong-byte
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some information for my test environment

  1. OS information and kernel version
    Debian GNU/Linux 10 (buster) 4.19.0-10-amd64
  2. cpu information
    Architecture: x86_64
    CPU op-mode(s): 32-bit, 64-bit
    Byte Order: Little Endian
    Address sizes: 46 bits physical, 48 bits virtual
    CPU(s): 96
    On-line CPU(s) list: 0-95
    Thread(s) per core: 2
    Core(s) per socket: 24
    Socket(s): 2
    NUMA node(s): 2
    Vendor ID: GenuineIntel
    CPU family: 6
    Model: 85
    Model name: Intel(R) Xeon(R) Gold 5220R CPU @ 2.20GHz
    Stepping: 7
    CPU MHz: 2901.122
    CPU max MHz: 4000.0000
    CPU min MHz: 1000.0000
    BogoMIPS: 4400.00
    Virtualization: VT-x
    L1d cache: 32K
    L1i cache: 32K
    L2 cache: 1024K
    L3 cache: 36608K
    NUMA node0 CPU(s): 0-23,48-71
    NUMA node1 CPU(s): 24-47,72-95
    Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni md_clear flush_l1d arch_capabilities
  3. memory information
    Number Of Devices: 12
    Size: 32 GB
    Type: DDR4
    Speed: 2933 MT/s
    Manufacturer: Samsung
    Configured Memory Speed: 2666 MT/s

testing method

I use a “mlc” tool from intel:
https://software.intel.com/content/www/us/en/develop/articles/intelr-memory-latency-checker.html

The test script is as follows:

#!/bin/bash

core_list="
1
1,2
" # will run cores in this list, 1 loop per line.

operation="-R" # MLC operation, can be change to “W6” or “W7“

function start()
{
        for i in $core_list
        do
                for mba in $(seq 10 10 100)
                do
                        pqos -I -R
                        pqos -I -a core:1=$i   # bound COS1 for cores
                        pqos -I -e mba:1=$mba  # bound MBA policy to COS1

                        echo -n "COS1 cpus_list:"
                        cat /sys/fs/resctrl/COS1/cpus_list
                        echo -n "COS1 schemata:"
                        cat /sys/fs/resctrl/COS1/schemata

                        mkdir -p $i

                        pqos -I -r -m all:[$i] > $i/pqos_$mba.txt & # pqos as monitor

                        echo "mlc --loaded_latency -d0 $operation -t300 -T -k$i > $i/$mba.txt" # run 5min
                        mlc --loaded_latency -d0 $operation -t300 -T -k$i > $i/$mba.txt # run 5min
                        pkill -9 pqos # close pqos
                        pqos -I -R # reset all RDT  settings.

                done
        done
}

start # begin test.`

test results

Memory Bandwidth Allocation Percent “-k1” pqos MBL[MB/s] avg “-k1” Error Percent “-k1” mlc --loaded_latency(Bandwidth MB/sec) “-k1” Error Percent “-k1,2” pqos MBL[MB/s] avg “-k1,2” Error Percent “-k1,2” mlc --loaded_latency(Bandwidth MB/sec) “-k1,2” Error Percent
10 1885.79 -50.55% 2310.8 -39.40% 3910.12 -43.74% 4623.1 -41.19%
20 2701.7 -7.84% 3468.5 -4.62% 5862.85 -7.76% 6938.7 -5.95%
30 3682.57 2.00% 4716.1 5.16% 7912.79 3.04% 9430.1 4.00%
40 5991.09 -19.57% 8119.1 -22.45% 13446 -23.57% 16114.4 -23.03%
50 6633.05 -5.91% 8864.5 -6.95% 14511 -6.69% 17576.1 -7.35%
60 7270.89 3.25% 9788.4 1.58% 15638.6 4.19% 19370.9 1.40%
70 8109.8 7.51% 10948 5.65% 17447.1 8.38% 21606.6 5.73%
80 8025.33 19.91% 10949 17.43% 17659.2 18.85% 21609.1 17.51%
90 7867.21 30.21% 10952.6 26.58% 18166.7 25.80% 21614.3 26.66%
100 9896.43 20.99% 13755.1 17.02% 21352.9 21.51% 25468.2 22.22%

From the point, when the restriction percentage is 20, 30, 50, 60, and 70, the restriction effect is better, and other errors are larger.

my question

Has someone ever meet the same things? Please help me, thanks.

@limitedge
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Have you tried this experiment in more than one system and you did try it multiple times? what version of python are you running?

@liuyingdong-byte
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Author

I am sorry but It’s not convenient for me to provide this email address because it’s a private work email.
What is the test result with this script I provided? How did you test when control memory bandwidth by unit of percentage(MBA in M%, e.g. pqos -I -e 'mba:1=M')?I find much better when control memory bandwidth by using in MBA in N MB/s(e.g. pqos -I -e 'mba_max:1=N'), did you meet similar situation before?

Thank you for your attention to this matter.

@intel intel deleted a comment from limitedge Jan 22, 2021
@intel intel deleted a comment from liuyingdong-byte Jan 22, 2021
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