diff --git a/IOPins.h b/IOPins.h index fe0fea4b..0adaea60 100644 --- a/IOPins.h +++ b/IOPins.h @@ -59,6 +59,9 @@ #elif defined(STM32F4_DVM) #include "pins/pins_f4_stm32dvm_v3.h" +#elif defined(STM32F7_DVM) + #include "pins/pins_f7_stm32dvm_v5.h" + #elif defined(DRCC_DVM_NQF) #include "pins/pins_f4_drcc_nqf.h" diff --git a/Makefile b/Makefile index 131b9903..230af0c0 100644 --- a/Makefile +++ b/Makefile @@ -133,8 +133,10 @@ DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VAL DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board: DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE -# STM32F4 DVM board: +# RB STM32F4_DVM board: DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE +# RB STM32F7 DVM board: +DEFS_DVM722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F7_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # MMDVM_RPT_Hat BG4TGO, BG5HHP board: DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # DRCC_DVM BG7NQF board: @@ -222,11 +224,17 @@ f767: LDFLAGS+=$(LDFLAGS_F767) f767: release_f7 dvm: GitVersion.h -dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) +dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446 +dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446 dvm: LDFLAGS+=$(LDFLAGS_F4) dvm: release_f4 +dvm722: GitVersion.h +dvm722: CFLAGS+=$(CFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722 +dvm722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722 +dvm722: LDFLAGS+=$(LDFLAGS_F722) +dvm722: release_f7 + drcc_nqf: GitVersion.h drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF diff --git a/SerialPort.cpp b/SerialPort.cpp index 9746a46c..6d811402 100644 --- a/SerialPort.cpp +++ b/SerialPort.cpp @@ -99,6 +99,10 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U; #define HW_TYPE "MMDVM DRCC_DVM_NQF" #elif defined(DRCC_DVM_HHP446) #define HW_TYPE "MMDVM DRCC_DVM_HHP(446)" +#elif defined(DRCC_DVM_722) +#define HW_TYPE "MMDVM RB_STM32_DVM(722)" +#elif defined(DRCC_DVM_446) +#define HW_TYPE "MMDVM RB_STM32_DVM(446)" #else #define HW_TYPE "MMDVM" #endif diff --git a/pins/pins_f4_stm32dvm_v3.h b/pins/pins_f4_stm32dvm_v3.h index ff7895c2..35e06e1c 100644 --- a/pins/pins_f4_stm32dvm_v3.h +++ b/pins/pins_f4_stm32dvm_v3.h @@ -32,7 +32,7 @@ NXDN PB9 output DSTAR PB6 output DMR PB5 output YSF PB7 output -POCSAG PC10 output +POCSAG PC10 output (Not Valid) RX PB0 analog input RSSI PB1 analog input @@ -78,9 +78,15 @@ EXT_CLK PA15 input #define PORT_YSF GPIOB #define RCC_Per_YSF RCC_AHB1Periph_GPIOB +/* #define PIN_POCSAG GPIO_Pin_10 #define PORT_POCSAG GPIOC #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC +*/ + +#define PIN_FM GPIO_Pin_14 +#define PORT_FM GPIOB +#define RCC_Per_FM RCC_AHB1Periph_GPIOB #define PIN_EXT_CLK GPIO_Pin_15 #define SRC_EXT_CLK GPIO_PinSource15 @@ -99,4 +105,4 @@ EXT_CLK PA15 input #define PIN_TX GPIO_Pin_4 #define PIN_TX_CH DAC_Channel_1 -#endif \ No newline at end of file +#endif diff --git a/pins/pins_f7_stm32dvm_v5.h b/pins/pins_f7_stm32dvm_v5.h new file mode 100644 index 00000000..0e3ed4f9 --- /dev/null +++ b/pins/pins_f7_stm32dvm_v5.h @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2019,2020 by BG5HHP + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _PINS_F7_STM32DVM_V5_H +#define _PINS_F7_STM32DVM_V5_H + +/* +Pin definitions for STM32F4 STM32-DVM rev 5 Board: + +COS PB13 input +PTT PB12 output +COSLED PB4 output +LED PB3 output + +P25 PB8 output +NXDN PB9 output +DSTAR PB6 output +DMR PB5 output +YSF PB7 output +POCSAG PC10 output (Not Valid) + +RX PB0 analog input +RSSI PB1 analog input +TX PA4 analog output + +EXT_CLK PA15 input +*/ + +#define PIN_COS GPIO_Pin_13 +#define PORT_COS GPIOB +#define RCC_Per_COS RCC_AHB1Periph_GPIOB + + +#define PIN_PTT GPIO_Pin_12 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB + +#define PIN_COSLED GPIO_Pin_4 +#define PORT_COSLED GPIOB +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB + +#define PIN_LED GPIO_Pin_3 +#define PORT_LED GPIOB +#define RCC_Per_LED RCC_AHB1Periph_GPIOB + +#define PIN_P25 GPIO_Pin_8 +#define PORT_P25 GPIOB +#define RCC_Per_P25 RCC_AHB1Periph_GPIOB + +#define PIN_NXDN GPIO_Pin_9 +#define PORT_NXDN GPIOB +#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB + +#define PIN_DSTAR GPIO_Pin_6 +#define PORT_DSTAR GPIOB +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB + +#define PIN_DMR GPIO_Pin_5 +#define PORT_DMR GPIOB +#define RCC_Per_DMR RCC_AHB1Periph_GPIOB + +#define PIN_YSF GPIO_Pin_7 +#define PORT_YSF GPIOB +#define RCC_Per_YSF RCC_AHB1Periph_GPIOB + +/* +#define PIN_POCSAG GPIO_Pin_10 +#define PORT_POCSAG GPIOC +#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC +*/ + +#define PIN_FM GPIO_Pin_14 +#define PORT_FM GPIOB +#define RCC_Per_FM RCC_AHB1Periph_GPIOB + +#define PIN_EXT_CLK GPIO_Pin_15 +#define SRC_EXT_CLK GPIO_PinSource15 +#define PORT_EXT_CLK GPIOA + +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_8 +#define PORT_RX GPIOB +#define RCC_Per_RX RCC_AHB1Periph_GPIOB + +#define PIN_RSSI GPIO_Pin_1 +#define PIN_RSSI_CH ADC_Channel_9 +#define PORT_RSSI GPIOB +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB + +#define PIN_TX GPIO_Pin_4 +#define PIN_TX_CH DAC_Channel_1 + +#endif