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Tang Nano 20k support #1186
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The GW2NA series chips are still supported at a very early experimental stage. The database should presumably be suitable not only for TangPrimer20k, but also for tangnano20k. Theoretically it takes very little change in nextpnr (actually just a change in the regular expression to parse the chip name) to select the right chip package configuration from the database. I don't have tangnano20k yet and I can't practically test it on hardware. |
Ah yeah, to understand what is the experimental stage - you better not flash directly to flash - if there are inaccuracies in the processing of the CFG fuse tile, you will get a brick. Use SRAM. |
I can't do complete PNR yet so can't flash or use SRAM. Is there a way of unlocking the experimental stuff in nextpnr? |
Without compiling? No. And as I wrote, you have to make changes to support GW2AR-18. |
Have there been any improvements since? |
Yes, the situation with Tangnano20k support has definitely changed for the better. You can use everything that is on other Gowin boards including BSRAM, you can even replicate the FemtoRISCV processor (not yet included in the apicula package). tn20l.mp4 |
Thank you very much for the quick reply; that is awesome. |
Yes, all the necessary functionality for Tangnano20k is already in the current release of nextpnr (0.7), there are a couple of my fixes awaiting consideration (#1290 and #1291 ), but these only improve routing and a rare use case for IOLOGIC. Of course, you need the latest release of apicula to have chip databases. I don’t know about yosys - I worked very closely on BRAM inferring, but whether they were included in any release... I don’t know. P.S. Tangnano20k (GW2A-18C) mentioned in CMakeLists.txt maybe you're still looking at the legacy directory ;)
This is how options are specified when assembling for Tangnano20k: |
I see now, thank you! I'm running Yosys, but I am very flexible as I am still learning all this stuff (so thank you for your patience :)). |
I can’t say about global recompilation, but you can probably change the nextpnr binary call. Of course, changing the arguments - they are indicated differently - see example from apicula |
Okay, I went through and got up Apycula running with nextpnr-himbeachel, which is awesome. I'm just testing a tang-nano4k (because I have a code for it that I know is working) tang-nano20k will come next. But when adding some very small array to my hdl, this error popped up: I thought that bsram was supported, or am I mistaken? (note: this test array was not placable using Yosys in my testing either, but I thought this version should be able to support it) |
And now something completely different (just kidding). (* ram_style="block" *)
reg [31:0] RegisterBank [0:31]; https://yosyshq.readthedocs.io/projects/yosys/en/latest/CHAPTER_Memorymap.html |
I know this got out of the scope of this issue... But thank you very much for your patience.
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Synthesis could not find a suitable mapping to implement your use of memory for the existing primitives. Since I have little understanding of synthesis, I can hardly help. Perhaps if your project is small and is on github and uses only yosys/nextpnr/gowin_pack and has a Makefile, I would take a look, but I definitely won’t install complex things because DragonFlyBSD is not very friendly with docker, wasm, rust and other things from the evil one :) |
Yeah, that was just my fault. I wondered if it was a Yosys or nextpr problem since there were no obvious errors or warnings listed, but yeah, my fault. Thank you very much! I was able to flash tang nano 4k & 20k successfully. |
Excellent! |
Am using lushaylabs Visual Studio plugin to call parts of oss-cad-suite.
With options in the x.lushay.json file of:
"board": "tangnano20k"
I can synthesize okay but the error of:
Finished Synthesys
Starting PnR with NextPnR
ERROR: Invalid device GW2AR-LV18QN88C8/I7
Finished PnR
Is there support for this device yet?
Thank you
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