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custom.cpp
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custom.cpp
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/*
* UAE - The Un*x Amiga Emulator
*
* Custom chip emulation
*
* Copyright 1995-2002 Bernd Schmidt
* Copyright 1995 Alessandro Bissacco
* Copyright 2000-2002 Toni Wilen
*/
#define USE_IMASK_TABLE
#define STOP_WHEN_NASTY
#define SPR0_HPOS 0x15
#include "sysconfig.h"
#include "sysdeps.h"
#include <ctype.h>
#include <assert.h>
#include "config.h"
#include "uae.h"
#include "options.h"
#include "thread.h"
#include "gensound.h"
#include "sound.h"
#include "debug_uae4all.h"
#include "events.h"
#include "memory-uae.h"
#include "custom.h"
#include "m68k/m68k_intrf.h"
#include "cia.h"
#include "disk.h"
#include "blitter.h"
#include "xwin.h"
#include "joystick.h"
#include "audio.h"
#include "keybuf.h"
#include "serial.h"
#include "osemu.h"
#include "autoconf.h"
#include "gui.h"
#include "drawing.h"
#include "savestate.h"
#include "menu_config.h"
#ifdef STOP_WHEN_COPPER
static __inline__ void setcopper(void)
{
#ifdef USE_FAME_CORE
m68k_release_timeslice();
#endif
set_special (SPCFLAG_COPPER);
}
#else
#define setcopper() set_special(SPCFLAG_COPPER)
#endif
#ifdef STOP_WHEN_NASTY
static __inline__ void setnasty(void)
{
#ifdef USE_FAME_CORE
m68k_release_timeslice();
#endif
set_special (SPCFLAG_BLTNASTY);
}
#else
#define setnasty() set_special (SPCFLAG_BLTNASTY)
#endif
#if !defined(DEBUG_INTERRUPTS) && defined(USE_FAME_CORE) && defined(USE_IMASK_TABLE)
#include "imask_tab.h"
#endif
#ifdef USE_CUSTOM_EXTRA_INLINE
#define _INLINE_ __inline__
#else
#define _INLINE_
#endif
static uae_u16 last_custom_value;
/* Line buffers */
static uae_u32 todisplay[MAX_PLANES][8] UAE4ALL_ALIGN;
static uae_u32 outword[MAX_PLANES];
static uae_u32 fetched[MAX_PLANES];
static uae_u32 fetched_aga0[MAX_PLANES];
static uae_u32 fetched_aga1[MAX_PLANES];
/* Mouse and joystick emulation */
int buttonstate[3];
int mouse_x, mouse_y;
int joy0button, joy1button;
unsigned int joy0dir, joy1dir;
extern int mouseMoving;
extern int fcounter;
/* Events */
unsigned long int currcycle, nextevent;
unsigned long last_synctime = 0;
frame_time_t syncbase;
struct ev eventtab[ev_max];
static int vpos;
static uae_u16 lof;
static int next_lineno;
static int lof_changed = 0;
static uae_u32 sprtaba[256],sprtabb[256];
static uae_u32 sprite_ab_merge[256];
/* Tables for collision detection. */
static uae_u32 sprclx[16], clxmask[16];
/*
* Hardware registers of all sorts.
*/
static void custom_wput_1 (int, uaecptr, uae_u32) REGPARAM;
uae_u16 intena,intreq;
uae_u16 dmacon;
uae_u16 adkcon; /* used by audio code */
static uae_u32 cop1lc,cop2lc,copcon;
int maxhpos = MAXHPOS_PAL;
int maxvpos = MAXVPOS_PAL;
int minfirstline = MINFIRSTLINE_PAL;
static int fmode;
unsigned int beamcon0 = -1, new_beamcon0;
#ifdef USE_UAE4ALL_VKBD
extern int vkbd_mode;
#endif
/* This is but an educated guess. It seems to be correct, but this stuff
* isn't documented well. */
enum sprstate { SPR_restart, SPR_waiting_start, SPR_waiting_stop };
struct sprite {
uaecptr pt;
int xpos;
int vstart;
int vstop;
int armed;
enum sprstate state;
} UAE4ALL_ALIGN;
static struct sprite spr[MAX_SPRITES];
static int sprite_vblank_endline = 25;
static unsigned int sprpos[MAX_SPRITES] UAE4ALL_ALIGN;
static unsigned int sprctl[MAX_SPRITES] UAE4ALL_ALIGN;
static uae_u16 sprdata[MAX_SPRITES][4] UAE4ALL_ALIGN;
static uae_u16 sprdatb[MAX_SPRITES][4] UAE4ALL_ALIGN;
static int sprite_last_drawn_at[MAX_SPRITES] UAE4ALL_ALIGN;
static int last_sprite_point, nr_armed;
static int sprite_width, sprres, sprite_buffer_res;
static uae_u32 bpl1dat, bpl2dat, bpl3dat, bpl4dat, bpl5dat, bpl6dat, bpl7dat, bpl8dat;
static uae_s16 bpl1mod, bpl2mod;
typedef struct {
uaecptr pt;
int off;
} bpl_t;
static bpl_t bpl[8] UAE4ALL_ALIGN;
/* Used as a debugging aid, to offset any bitplane temporarily. */
static struct color_entry current_colors;
static unsigned int bplcon0, bplcon1, bplcon2, bplcon3, bplcon4;
static unsigned int planes_bplcon0, res_bplcon0;
static unsigned int diwstrt, diwstop, diwhigh;
static int diwhigh_written;
static int ddfstrt, ddfstop;
static unsigned int ddfstrt_old_hpos, ddfstrt_old_vpos;
static int ddf_change;
/* The display and data fetch windows */
enum diw_states
{
DIW_waiting_start, DIW_waiting_stop
};
static int plffirstline, plflastline;
static int plfstrt, plfstop;
static int last_diw_pix_hpos, last_decide_line_hpos;
static int last_fetch_hpos, last_sprite_hpos;
int diwfirstword, diwlastword;
static enum diw_states diwstate, hdiwstate, ddfstate;
/* Sprite collisions */
static unsigned int clxdat, clxcon, clxcon2, clxcon_bpl_enable, clxcon_bpl_match;
static int clx_sprmask;
#define FAST_COPPER
enum copper_states {
COP_stop,
COP_read1_in2,
COP_read1_wr_in4,
COP_read1_wr_in2,
COP_read1,
COP_read2_wr_in2,
COP_read2,
COP_bltwait,
COP_wait_in4,
COP_wait_in2,
COP_skip_in4,
COP_skip_in2,
COP_wait1,
COP_wait,
COP_skip1,
COP_strobe_delay
};
struct copper {
/* The current instruction words. */
unsigned int i1, i2;
unsigned int saved_i1, saved_i2;
enum copper_states state;
/* Instruction pointer. */
uaecptr ip, saved_ip;
int hpos, vpos;
unsigned int ignore_next;
int vcmp, hcmp;
#ifdef FAST_COPPER
/* When we schedule a copper event, knowing a few things about the future
of the copper list can reduce the number of sync_with_cpu calls
dramatically. */
unsigned int first_sync;
unsigned int regtypes_modified;
#endif
int strobe; /* COPJMP1 / COPJMP2 accessed */
} UAE4ALL_ALIGN;
#ifdef FAST_COPPER
#define REGTYPE_NONE 0
#define REGTYPE_COLOR 1
#define REGTYPE_SPRITE 2
#define REGTYPE_PLANE 4
#define REGTYPE_BLITTER 8
#define REGTYPE_JOYPORT 16
#define REGTYPE_DISK 32
#define REGTYPE_POS 64
#define REGTYPE_AUDIO 128
#define REGTYPE_ALL 255
/* Always set in regtypes_modified, to enable a forced update when things like
DMACON, BPLCON0, COPJMPx get written. */
#define REGTYPE_FORCE 256
static unsigned int regtypes[512];
#endif
static struct copper cop_state;
static int copper_enabled_thisline;
/*
* Statistics
*/
static unsigned long int lastframetime = 0, timeframes = 0;
/* Recording of custom chip register changes. */
struct sprite_entry *curr_sprite_entries;
struct color_change *curr_color_changes;
#define MAX_SPRITE_ENTRY (1024*6)
#define MAX_COLOR_CHANGE (1024*10)
struct decision line_decisions[2 * (MAXVPOS + 1) + 1];
struct draw_info curr_drawinfo[2 * (MAXVPOS + 1) + 1];
struct color_entry curr_color_tables[(MAXVPOS + 1) * 2];
static int next_sprite_entry = 0;
static int next_sprite_forced = 1;
static int next_color_change;
static int next_color_entry, remembered_color_entry;
static struct decision thisline_decision;
static int passed_plfstop, fetch_cycle, fetch_modulo_cycle;
enum fetchstate {
fetch_not_started,
fetch_started,
fetch_was_plane0
} fetch_state;
/*
* helper functions
*/
uae_u32 get_copper_address (int copno)
{
switch (copno) {
case 1: return cop1lc;
case 2: return cop2lc;
default: return 0;
}
}
void check_prefs_changed_custom (void)
{
prefs_gfx_framerate = changed_gfx_framerate;
}
static __inline__ void setclr (uae_u16 *_GCCRES_ p, uae_u16 val)
{
if (val & 0x8000)
*p |= val & 0x7FFF;
else
*p &= ~val;
}
#define current_hpos() ((get_cycles () - eventtab[ev_hsync].oldcycles) / CYCLE_UNIT)
static __inline__ uae_u8 *_GCCRES_ pfield_xlateptr (uaecptr plpt, int bytecount)
{
plpt &= chipmem_mask;
if((plpt + bytecount) > allocated_chipmem)
return NULL;
return chipmemory + plpt;
}
static __inline__ void docols (struct color_entry *_GCCRES_ colentry)
{
int i;
if (currprefs.chipset_mask & CSMASK_AGA) {
for (i = 0; i < 256; i++) {
int v = color_reg_get (colentry, i);
if ((v < 0) || (v > 16777215))
continue;
colentry->acolors[i] = CONVERT_RGB (v);
}
} else {
for (i = 0; i < 32; i++) {
int v = color_reg_get (colentry, i);
if ((v < 0) || (v > 4095))
continue;
colentry->acolors[i] = xcolors[v];
}
}
}
void notice_new_xcolors (void)
{
int i;
docols(¤t_colors);
for (i = 0; i < (MAXVPOS + 1)*2; i++) {
docols(curr_color_tables + i);
}
}
static _INLINE_ void do_sprites (int currhp);
static _INLINE_ void remember_ctable (void)
{
if (remembered_color_entry == -1) {
/* The colors changed since we last recorded a color map. Record a
* new one. */
color_reg_cpy (curr_color_tables + next_color_entry, ¤t_colors);
remembered_color_entry = next_color_entry++;
}
thisline_decision.ctable = remembered_color_entry;
}
/* Called to determine the state of the horizontal display window state
* machine at the current position. It might have changed since we last
* checked. */
static _INLINE_ void decide_diw (int hpos)
{
int pix_hpos = coord_diw_to_window_x (hpos << 1);
if ((hdiwstate == DIW_waiting_start) && (pix_hpos >= diwfirstword) && (last_diw_pix_hpos < diwfirstword))
{
if(thisline_decision.diwfirstword == -1)
{
thisline_decision.diwfirstword = diwfirstword < 0 ? 0 : diwfirstword;
thisline_decision.diwlastword = -1;
}
hdiwstate = DIW_waiting_stop;
}
if ((hdiwstate == DIW_waiting_stop) && (pix_hpos >= diwlastword) && (last_diw_pix_hpos < diwlastword))
{
if(thisline_decision.diwlastword == -1)
thisline_decision.diwlastword = diwlastword < 0 ? 0 : diwlastword;
hdiwstate = DIW_waiting_start;
}
last_diw_pix_hpos = pix_hpos;
}
static int fetchmode;
static int delaymask;
static int maxplanes_ocs[]={ 6,4,0,0 };
static int maxplanes_ecs[]={ 6,4,2,0 };
static int maxplanes_aga[]={ 8,4,2,0, 8,8,4,0, 8,8,8,0 };
/* The HRM says 0xD8, but that can't work... */
#define HARD_DDF_STOP (0xD4)
#define HARD_DDF_START 0x18
static __inline__ void add_modulos()
{
if (dmaen (DMA_BITPLANE))
{
register int m1, m2;
if (fmode & 0x4000) {
if (((diwstrt >> 8) ^ vpos) & 1)
m1 = m2 = bpl2mod;
else
m1 = m2 = bpl1mod;
} else {
m1 = bpl1mod;
m2 = bpl2mod;
}
switch (planes_bplcon0) {
case 8: bpl[7].pt += m2;
case 7: bpl[6].pt += m1;
case 6: bpl[5].pt += m2;
case 5: bpl[4].pt += m1;
case 4: bpl[3].pt += m2;
case 3: bpl[2].pt += m1;
case 2: bpl[1].pt += m2;
case 1: bpl[0].pt += m1;
}
}
}
static __inline__ void finish_playfield_line()
{
/* add_modulos();*/
/* These are for comparison. */
thisline_decision.bplcon0 = bplcon0;
thisline_decision.bplcon2 = bplcon2;
thisline_decision.bplcon3 = bplcon3;
thisline_decision.bplcon4 = bplcon4;
}
/* The fetch unit mainly controls ddf stop. It's the number of cycles that
are contained in an indivisible block during which ddf is active. E.g.
if DDF starts at 0x30, and fetchunit is 8, then possible DDF stops are
0x30 + n * 8. */
static int fetchunit, fetchunit_mask;
/* The delay before fetching the same bitplane again. Can be larger than
the number of bitplanes; in that case there are additional empty cycles
with no data fetch (this happens for high fetchmodes and low
resolutions). */
static int fetchstart, fetchstart_mask;
/* fm_maxplane holds the maximum number of planes possible with the current
fetch mode. This selects the cycle diagram:
8 planes: 73516240
4 planes: 3120
2 planes: 10. */
static int fm_maxplane;
/* The corresponding values, by fetchmode and display resolution. */
static const int fetchunits[] = { 8,8,8,0, 16,8,8,0, 32,16,8,0 };
static const int fetchstarts[] = { 3,2,1,0, 4,3,2,0, 5,4,3,0 };
static const int fm_maxplanes[] = { 3,2,1,0, 3,3,2,0, 3,3,3,0 };
static int cycle_diagram_table[3][3][9][32];
// blitter_slowdown doesn't work at the moment (causes gfx glitches in Shadow of the Beast)
//static int cycle_diagram_free_cycles[3][3][9];
//static int cycle_diagram_total_cycles[3][3][9];
static int *curr_diagram;
static int cycle_sequences[3 * 8] = { 2,1,2,1,2,1,2,1, 4,2,3,1,4,2,3,1, 8,4,6,2,7,3,5,1 };
static _INLINE_ void create_cycle_diagram_table(void)
{
int fm, res, cycle, planes, v;
int fetch_start, max_planes/*, freecycles*/;
int *cycle_sequence;
for (fm = 0; fm <= 2; fm++) {
for (res = 0; res <= 2; res++) {
max_planes = fm_maxplanes[fm * 4 + res];
fetch_start = 1 << fetchstarts[fm * 4 + res];
cycle_sequence = &cycle_sequences[(max_planes - 1) * 8];
max_planes = 1 << max_planes;
for (planes = 0; planes <= 8; planes++) {
// freecycles = 0;
for (cycle = 0; cycle < 32; cycle++)
cycle_diagram_table[fm][res][planes][cycle] = -1;
if (planes <= max_planes) {
for (cycle = 0; cycle < fetch_start; cycle++) {
if ((cycle < max_planes) && (planes >= cycle_sequence[cycle & 7])) {
v = cycle_sequence[cycle & 7];
} else {
v = 0;
// freecycles++;
}
cycle_diagram_table[fm][res][planes][cycle] = v;
}
}
// cycle_diagram_free_cycles[fm][res][planes] = freecycles;
// cycle_diagram_total_cycles[fm][res][planes] = fetch_start;
}
}
}
}
/* Used by the copper. */
static int estimated_last_fetch_cycle;
static int cycle_diagram_shift;
static _INLINE_ void estimate_last_fetch_cycle (int hpos)
{
if (! passed_plfstop) {
int stop = (plfstop < hpos) || (plfstop > HARD_DDF_STOP) ? HARD_DDF_STOP : plfstop;
/* We know that fetching is up-to-date up until hpos, so we can use fetch_cycle. */
int fetch_cycle_at_stop = fetch_cycle + (stop - hpos);
int starting_last_block_at = (fetch_cycle_at_stop + fetchunit - 1) & ~fetchunit_mask;
estimated_last_fetch_cycle = hpos + (starting_last_block_at - fetch_cycle) + fetchunit;
} else {
int starting_last_block_at = (fetch_cycle + fetchunit - 1) & ~fetchunit_mask;
if (passed_plfstop == 2)
starting_last_block_at -= fetchunit;
estimated_last_fetch_cycle = hpos + (starting_last_block_at - fetch_cycle) + fetchunit;
}
}
static int out_nbits, out_offs;
/* Expansions from bplcon0/bplcon1. */
static int toscr_res;
static int toscr_res2;
static int toscr_delay[2], toscr_nr_planes;
/* WinUAE code */
static int toscr_delay1x, toscr_delay2x;
/***************/
/* The number of bits left from the last fetched words.
This is an optimization - conceptually, we have to make sure the result is
the same as if toscr is called in each clock cycle. However, to speed this
up, we accumulate display data; this variable keeps track of how much.
Thus, once we do call toscr_nbits (which happens at least every 16 bits),
we can do more work at once. */
static int toscr_nbits;
static int delayoffset;
/* WinUAE+UAE4ALL code */
#define compute_delay_offset(HPOS) \
{ \
delayoffset = (16 << fetchmode) - (((plfstrt - HARD_DDF_START) & fetchstart_mask) << 1); \
}
static _INLINE_ void expand_fmodes (void)
{
// int res = res_bplcon0;
int fm_index = fetchmode * 4 + res_bplcon0;
fetchunit = fetchunits[fm_index];
fetchunit_mask = fetchunit - 1;
int fetchstart_shift = fetchstarts[fm_index];
fetchstart = 1 << fetchstart_shift;
fetchstart_mask = fetchstart - 1;
int fm_maxplane_shift = fm_maxplanes[fm_index];
fm_maxplane = 1 << fm_maxplane_shift;
fetch_modulo_cycle = fetchunit - fetchstart;
}
/* Expand bplcon0/bplcon1 into the toscr_xxx variables. */
static __inline__ void compute_toscr_delay_1 ()
{
int delay1 = (bplcon1 & 0x0f) | ((bplcon1 & 0x0c00) >> 6);
int delay2 = ((bplcon1 >> 4) & 0x0f) | (((bplcon1 >> 4) & 0x0c00) >> 6);
int shdelay1 = (bplcon1 >> 12) & 3;
int shdelay2 = (bplcon1 >> 8) & 3;
delay1 += delayoffset;
delay2 += delayoffset;
toscr_delay1x = (delay1 & (delaymask >> toscr_res)) << toscr_res;
toscr_delay1x |= shdelay1 >> (2 - toscr_res);
toscr_delay2x = (delay2 & (delaymask >> toscr_res)) << toscr_res;
toscr_delay2x |= shdelay2 >> (2 - toscr_res);
}
STATIC_INLINE void compute_toscr_delay ()
{
toscr_res = res_bplcon0;
toscr_nr_planes = planes_bplcon0;
toscr_res2 = 2 << toscr_res;
compute_toscr_delay_1 ();
}
#define maybe_first_bpl1dat(HPOS) \
{ \
if (thisline_decision.plfleft == -1) { \
thisline_decision.plfleft = HPOS; \
compute_delay_offset (HPOS); \
compute_toscr_delay_1 (); \
} \
}
STATIC_INLINE void update_toscr_planes (void)
{
if (toscr_nr_planes > thisline_decision.nr_planes) {
if(thisline_decision.nr_planes > 0)
{
int j;
for (j = thisline_decision.nr_planes; j < toscr_nr_planes; j++)
{
memset ((uae_u32 *)(line_data[next_lineno] + 2 * MAX_WORDS_PER_LINE * j), 0, out_offs * 4);
}
}
thisline_decision.nr_planes = toscr_nr_planes;
}
}
STATIC_INLINE void toscr_3_ecs (int nbits)
{
register int delay1 = toscr_delay[0];
register int delay2 = toscr_delay[1];
register int i;
register uae_u32 mask = 0xFFFF >> (16 - nbits);
for (i = 0; i < toscr_nr_planes; i += 2) {
outword[i] <<= nbits;
outword[i] |= (todisplay[i][4] >> (16 - nbits + delay1)) & mask;
todisplay[i][4] <<= nbits;
}
for (i = 1; i < toscr_nr_planes; i += 2) {
outword[i] <<= nbits;
outword[i] |= (todisplay[i][4] >> (16 - nbits + delay2)) & mask;
todisplay[i][4] <<= nbits;
}
}
static __inline__ void shift32plus (uae_u32 *p, int n)
{
uae_u32 t = p[1];
t <<= n;
t |= p[0] >> (32 - n);
p[1] = t;
}
static __inline__ void aga_shift (uae_u32 *p, int n, int fm)
{
if (fm == 2) {
shift32plus (p + 2, n);
shift32plus (p + 1, n);
}
shift32plus (p + 0, n);
p[0] <<= n;
}
STATIC_INLINE void toscr_3_aga (int nbits, int fm)
{
int delay1 = toscr_delay[0];
int delay2 = toscr_delay[1];
int i;
uae_u32 mask = 0xFFFF >> (16 - nbits);
{
int offs = (16 << fm) - nbits + delay1;
int off1 = offs >> 5;
if (off1 == 3)
off1 = 2;
offs -= off1 * 32;
for (i = 0; i < toscr_nr_planes; i += 2) {
uae_u32 t0 = todisplay[i][off1 + 4];
uae_u32 t1 = todisplay[i][off1 + 5];
uae_u64 t = (((uae_u64)t1) << 32) | t0;
outword[i] <<= nbits;
outword[i] |= (t >> offs) & mask;
aga_shift (todisplay[i] + 4, nbits, fm);
}
}
{
int offs = (16 << fm) - nbits + delay2;
int off1 = offs >> 5;
if (off1 == 3)
off1 = 2;
offs -= off1 * 32;
for (i = 1; i < toscr_nr_planes; i += 2) {
uae_u32 t0 = todisplay[i][off1 + 4];
uae_u32 t1 = todisplay[i][off1 + 5];
uae_u64 t = (((uae_u64)t1) << 32) | t0;
outword[i] <<= nbits;
outword[i] |= (t >> offs) & mask;
aga_shift (todisplay[i] + 4, nbits, fm);
}
}
}
STATIC_INLINE void toscr_1 (int nbits, int fm)
{
if (fm == 0)
toscr_3_ecs (nbits);
else
toscr_3_aga (nbits, fm);
out_nbits += nbits;
if (out_nbits == 32) {
int i;
register uae_u32 *dataptr32_start = (uae_u32 *)(line_data[next_lineno]);
register uae_u32 *dataptr32 = dataptr32_start + out_offs;
/* Don't use toscr_nr_planes here; if the plane count drops during the
* line we still want the data to be correct for the full number of planes
* over the full width of the line.
*/
for (i = 0; i < thisline_decision.nr_planes; i++) {
*dataptr32 = outword[i];
dataptr32 += MAX_WORDS_PER_LINE >> 1;
}
out_offs++;
out_nbits = 0;
}
}
static __inline__ void toscr_0 (int nbits, int fm)
{
int t;
if (nbits > 16) {
toscr_0 (16, fm);
nbits -= 16;
}
t = 32 - out_nbits;
if (t < nbits) {
toscr_1 (t, fm);
nbits -= t;
}
toscr_1 (nbits, fm);
}
#define flush_display(FM) \
{ \
if ((toscr_nbits > 0) && (thisline_decision.plfleft != -1)) \
toscr_0 (toscr_nbits, FM); \
toscr_nbits = 0; \
}
/* Called when all planes have been fetched, i.e. when a new block
of data is available to be displayed. The data in fetched[] is
moved into todisplay[]. */
STATIC_INLINE void beginning_of_plane_block (int pos, int fm)
{
flush_display (fm);
if (fm == 0) {
todisplay[0][4] |= fetched[0];
todisplay[1][4] |= fetched[1];
todisplay[2][4] |= fetched[2];
todisplay[3][4] |= fetched[3];
todisplay[4][4] |= fetched[4];
todisplay[5][4] |= fetched[5];
todisplay[6][4] |= fetched[6];
todisplay[7][4] |= fetched[7];
}
else {
if (fm == 2) {
todisplay[0][5] = fetched_aga1[0];
todisplay[1][5] = fetched_aga1[1];
todisplay[2][5] = fetched_aga1[2];
todisplay[3][5] = fetched_aga1[3];
todisplay[4][5] = fetched_aga1[4];
todisplay[5][5] = fetched_aga1[5];
todisplay[6][5] = fetched_aga1[6];
todisplay[7][5] = fetched_aga1[7];
}
todisplay[0][4] = fetched_aga0[0];
todisplay[1][4] = fetched_aga0[1];
todisplay[2][4] = fetched_aga0[2];
todisplay[3][4] = fetched_aga0[3];
todisplay[4][4] = fetched_aga0[4];
todisplay[5][4] = fetched_aga0[5];
todisplay[6][4] = fetched_aga0[6];
todisplay[7][4] = fetched_aga0[7];
}
maybe_first_bpl1dat (pos);
toscr_delay[0] = toscr_delay1x;
toscr_delay[1] = toscr_delay2x;
}
#define long_fetch_ecs_init(PLANE, NWORDS, DMA) \
uae_u16 *real_pt = (uae_u16 *)pfield_xlateptr (bpl[PLANE].pt, NWORDS << 1); \
int delay = toscr_delay[(PLANE & 1)]; \
int tmp_nbits = out_nbits; \
uae_u32 shiftbuffer = todisplay[PLANE][4]; \
uae_u32 outval = outword[PLANE]; \
uae_u32 fetchval = fetched[PLANE]; \
uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + ((PLANE<<1)*MAX_WORDS_PER_LINE)); \
register uae_u32 *dataptr = dataptr_start + out_offs; \
if (DMA) \
bpl[PLANE].pt += NWORDS << 1; \
if (real_pt == 0) \
return; \
while (NWORDS > 0) { \
int bits_left = 32 - tmp_nbits; \
uae_u32 t; \
shiftbuffer |= fetchval; \
t = (shiftbuffer >> delay) & 0xFFFF;
#define long_fetch_ecs_weird() \
if (bits_left < 16) { \
outval <<= bits_left; \
outval |= t >> (16 - bits_left); \
*dataptr++ = outval; \
outval = t; \
tmp_nbits = 16 - bits_left; \
shiftbuffer <<= 16; \
} else
#ifdef USE_ARMNEON
#define long_fetch_ecs_end(PLANE,NWORDS, DMA) \
{ \
outval = (outval << 16) | t; \
shiftbuffer <<= 16; \
tmp_nbits += 16; \
if (tmp_nbits == 32) { \
*dataptr++ = outval; \
tmp_nbits = 0; \
} \
} \
NWORDS--; \
if (DMA) { \
/*fetchval = do_get_mem_word (real_pt);*/ \
/*real_pt++;*/ \
__asm__ __volatile__ ( \
"ldrh %[val], [%[pt]], #2 \n\t" \
: [val] "=r" (fetchval), [pt] "+r" (real_pt) ); \
} \
} \
fetched[PLANE] = fetchval; \
todisplay[PLANE][4] = shiftbuffer; \
outword[PLANE] = outval;
#else
#define long_fetch_ecs_end(PLANE,NWORDS, DMA) \
{ \
outval = (outval << 16) | t; \
shiftbuffer <<= 16; \
tmp_nbits += 16; \
if (tmp_nbits == 32) { \
*dataptr++ = outval; \
tmp_nbits = 0; \
} \
} \
NWORDS--; \
if (DMA) { \
fetchval = do_get_mem_word (real_pt); \
real_pt++; \
} \
} \
fetched[PLANE] = fetchval; \
todisplay[PLANE][4] = shiftbuffer; \
outword[PLANE] = outval;
#endif
static __inline__ void long_fetch_ecs_0(int plane, int nwords, int dma)
{
long_fetch_ecs_init(plane, nwords, dma)
long_fetch_ecs_end(plane, nwords, dma)
}
static __inline__ void long_fetch_ecs_1(int plane, int nwords, int dma)
{
long_fetch_ecs_init(plane, nwords, dma)
long_fetch_ecs_weird()
long_fetch_ecs_end(plane, nwords, dma)
}
#ifdef USE_ARMNEON
#define long_fetch_aga_1_init() \
uae_u32 *real_pt = (uae_u32 *)pfield_xlateptr (bpl[plane].pt + bpl[plane].off, nwords * 2); \
int tmp_nbits = out_nbits; \
uae_u32 outval = outword[plane]; \
uae_u32 fetchval0 = fetched_aga0[plane]; \
uae_u32 fetchval1 = fetched_aga1[plane]; \
uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + (plane<<1)*MAX_WORDS_PER_LINE); \
uae_u32 *dataptr = dataptr_start + out_offs; \
\
int offs = (16 << 1) - 16 + toscr_delay[plane & 1]; \
int off1 = offs >> 5; \
if (off1 == 3) \
off1 = 2; \
offs -= off1 << 5; \
\
if (dma) \
bpl[plane].pt += nwords << 1; \
\
if (real_pt == 0) \
/* @@@ Don't do this, fall back on chipmem_wget instead. */ \
return; \
\
/* Instead of shifting a 64 bit value more than 16 bits, we */ \
/* move the pointer for x bytes and shift a 32 bit value less */ \
/* than 16 bits. See (1) */ \
int buffer_add = (offs >> 4); \
offs &= 15; \
\
while (nwords > 0) { \
int i; \
uae_u32 *shiftbuffer = todisplay[plane] + 4; \
\
shiftbuffer[0] = fetchval0; \
\
/* (1) */ \
if(buffer_add) \
shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer + buffer_add); \
\
for (i = 0; i < (1 << 1); i++) { \
int bits_left = 32 - tmp_nbits; \
\
uae_u32 t0 = shiftbuffer[off1]; \
t0 = (t0 >> offs) & 0xFFFF;
#define long_fetch_aga_2_init() \
uae_u32 *real_pt = (uae_u32 *)pfield_xlateptr (bpl[plane].pt + bpl[plane].off, nwords * 2); \
int tmp_nbits = out_nbits; \
uae_u32 outval = outword[plane]; \
uae_u32 fetchval0 = fetched_aga0[plane]; \
uae_u32 fetchval1 = fetched_aga1[plane]; \
uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + (plane<<1)*MAX_WORDS_PER_LINE); \
uae_u32 *dataptr = dataptr_start + out_offs; \
\
int offs = (16 << 2) - 16 + toscr_delay[plane & 1]; \
int off1 = offs >> 5; \
if (off1 == 3) \
off1 = 2; \
offs -= off1 << 5; \
\
if (dma) \
bpl[plane].pt += nwords << 1; \
\
if (real_pt == 0) \
/* @@@ Don't do this, fall back on chipmem_wget instead. */ \
return; \
\
/* Instead of shifting a 64 bit value more than 16 bits, we */ \
/* move the pointer for x bytes and shift a 32 bit value less */ \
/* than 16 bits. See (1) */ \
int buffer_add = (offs >> 4); \
offs &= 15; \
\
while (nwords > 0) { \
int i; \
uae_u32 *shiftbuffer = todisplay[plane] + 4; \
\
shiftbuffer[0] = fetchval0; \
shiftbuffer[1] = fetchval1; \
\
/* (1) */ \
if(buffer_add) \
shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer + buffer_add); \
\
for (i = 0; i < (1 << 2); i++) { \
int bits_left = 32 - tmp_nbits; \
\
uae_u32 t0 = shiftbuffer[off1]; \
t0 = (t0 >> offs) & 0xFFFF;
#define long_fetch_aga_weird() \
if (bits_left < 16) { \
outval <<= bits_left; \
outval |= t0 >> (16 - bits_left); \
*dataptr++ = outval; \
outval = t0; \
tmp_nbits = 16 - bits_left; \
/* Instead of shifting 128 bit of data for 16 bit, */ \
/* we move the pointer two bytes. See also (2) and (3) */ \
/*aga_shift (shiftbuffer, 16, fm); */ \
shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); \
} else
#define long_fetch_aga_1_end() \
{ \
outval = (outval << 16) | t0; \
/* (2) */ \
/*aga_shift (shiftbuffer, 16, fm); */ \
shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); \
tmp_nbits += 16; \
if (tmp_nbits == 32) { \
*dataptr++ = outval; \
tmp_nbits = 0; \
} \
} \
} \
\
/* (3) */ \
/* We have to move the data, but now, we can simply */ \