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License missing #13

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jankralx opened this issue Sep 4, 2023 · 2 comments
Open

License missing #13

jankralx opened this issue Sep 4, 2023 · 2 comments

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@jankralx
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jankralx commented Sep 4, 2023

Hello,

we would like to use your IP core in our open source digital chip design (https://tinytapeout.com/). Since you have no license specified, we would like to ask you for your permission. Could you please confirm that we can use your design for this purpose or add the license file.

Thank you for your cooperation.

Best regards,
Jan

@WangXuan95
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Hello,
I've add GPL3 license to my repo.
Thanks for liking my repo, and dont forget to star it!

@lnchan lnchan mentioned this issue Jan 29, 2024
@the-moog
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the-moog commented Feb 9, 2024

Hi, I am very excited by your project and commend your style of Verilog code. I see this as a very useful project due to it's low level and well constructed architecture. BTW, your code is very clear to read too.
However, it is a shame that, as it stands, people can't make use of, and hence contribute to, this project due to the choice of GPLv3, let me explain...

Something many people seem to be unaware of is that GPLv3 is not a good choice for any open source FPGA source code (e.g. HDL) project or derived data (such as EDIF or binary blobs) where that project could be used in a non-GPLv3 compatible way. Just as any programming library. See GNU's own recommendations to that respect.

If you make parallels between the way software code and hardware code is constructed, an FPGA or PLD is considered a binary static linked image, and hence a static library. (Some FPGAs allow the possibility of overlays, so effective dynamic linkage)

Hence why the Linux Kernel is GPL2 and not GPL3 and why LGPL and other such permissive licences such as MIT, ISC and Apache exist. e.g. Linux is built from thousands of components under many other licences and they are also not all GPL3 compatible. GPL2 does not have this issue as 'for own non-commercial use' static linkage is permitted, but even that has it's own limitations.

If you consider the references below, GPLv3 effectively means that any project which incorporates any part, no matter how derivative, of this source code or any object generated from that source itself MUST be GPLv3 compatible and that relationship is mutually applied.

So any IP also linked into your project by any user even if that code or object is not theirs and/or under some other license (and that would include pretty much 100% of vendor IP), must also be GPLv3.

Theoretically it's possible, but I don't think many people write FPGA code these days without using at least some closed source IP within the final FPGA image. E.g. a memory block or faster divider inference creates a mapping to vendor IP.

See license compatibility @ Wikipedia for further details. There are many other sources that discuss this topic that can be found with a simple search, I've included some below.

For that reason, sadly, the adoption of GPLv3 makes it impossible to use any part of this project in many if not most situations and still adhere to the GPL3. This is true even for some employee's internal 'toy' project within any company. That work can risk exposing that company to litigation from more than one angle.

This is why I asked that you consider adopting a more suitable licence To that end, I recommend Apache or LGPL, or offer a dual licence, e.g. Include a commercial licence in exchange for other terms, e.g. static linkage permitted, if not then used for profit and source contribution only within this as a separate library to the users' or vendors' code.

Sorry this took so many words to explain, I hope this helps you consider making what is a very small change.

Other references of note:
https://en.wikipedia.org/wiki/GNU_General_Public_License
https://fossa.com/blog/open-source-software-licenses-101-gpl-v2/
https://en.wikipedia.org/wiki/Comparison_of_free_and_open-source_software_licenses

@WangXuan95 WangXuan95 reopened this Feb 9, 2024
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